Forming method of PMOS (P-channel metal oxide semiconductor) transistor

Abstract

The invention provides a forming method of a PMOS (P-channel metal oxide semiconductor) transistor. The method comprises the following steps that a semiconductor substrate is provided; a pseudo grid dielectric material layer and a pseudo grid electrode positioned on the surface of the pseudo grid dielectric layer are formed on the semiconductor substrate, and the pseudo grid electrode covers the partial pseudo grid dielectric material layer; a dielectric layer is formed on the semiconductor substrate, the surface of the dielectric layer is flush with the surface of the pseudo grid electrode, the pseudo grid electrode and a partial pseudo grid dielectric layer positioned under the pseudo grid electrode are removed, and a first groove is formed; the bottom of the first groove is subjected to plasma injection for forming an injection region, and the migration rate of carriers can be enhanced through plasmas; the injection region is subjected to recrystallization processing, and the defects in the injection region are eliminated, so that the injection region can become a channel region; a grid electrode structure is formed in the first groove, and the grid electrode structure comprises a grid dielectric layer positioned at the surface of the inner wall of the first groove and a grid electrode positioned on the surface of the grid dielectric layer. When the method is adopted, the migration rate of the carriers of the PMOS transistor can be improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a PMOS transistor. Background technique [0002] MOS transistors are the most basic electronic components in integrated circuits, and the performance of MOS transistors has a huge impact on the performance of the entire chip. [0003] Please refer to figure 1 , is a schematic structural diagram of a MOS transistor in the prior art. [0004] The MOS transistor comprises: a semiconductor substrate 10; a gate structure 20 located on the surface of the semiconductor substrate 10, the gate structure 20 comprising a gate dielectric layer 21 located on the surface of the semiconductor substrate 10 and a gate dielectric layer located on the surface of the semiconductor substrate 10 The gate 22 on the surface of the gate structure 21; the sidewalls 30 on the sidewall surfaces on both sides of the gate structure 20; the source and drain 40 in the semiconductor...

AI Technical Summary

Problems solved by technology

[0006] In NMOS transistors, the carriers are electrons, and the mobility in silicon is large, so that the NMOS transistor has a high saturation current; while in the PMOS transistor, the carriers are holes, and the mobility of holes in silicon lower, resulting in a lower saturation current of the PMOS transistor, the performance of the PMOS transistor needs to be further improved

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