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Method of forming memory

A memory and graphics technology, applied in semiconductor devices, electric solid devices, electrical components, etc., can solve the problem of poor storage capacity of floating gates, achieve high flatness, uniform thickness, and improve the ability to hold charges.

Active Publication Date: 2019-01-22
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] With the shrinking of the semiconductor feature size, the thickness of the insulating layer in ETOX continues to decrease, and the local electric field strength near the insulating layer is often greater than the surrounding electric field strength, which makes the ability of the floating gate to store charges worse. At present, there is an urgent need for a memory The formation method, without increasing the thickness of the insulating layer, reduces the local electric field strength near the memory, so as to improve the ability of the floating gate to store charges

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Embodiment Construction

[0032] With the shrinking of the semiconductor feature size, the thickness of the insulating layer in the memory, especially in ETOX, is constantly decreasing. It often occurs that the local electric field strength near the insulating layer is greater than the surrounding electric field strength, which makes the ability of the floating gate to hold charges worse.

[0033] The phenomenon that the local electric field intensity near the insulating layer of the existing technology is greater than the intensity of the surrounding electric field is analyzed. The uniformity is poor, causing the local electric field strength near the insulating layer to be greater than that of the surrounding electric field.

[0034] In order to solve the technical problem, the present invention provides a method for forming a memory, using a self-aligned isolation structure process, after forming the floating gate and the isolation material layer between the floating gates, the top of the floating ga...

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Abstract

The invention provides a method for forming a memory, including providing a substrate; forming a floating gate material layer on the substrate; patterning the floating gate material layer and the substrate, forming a floating gate on the substrate and a floating an opening in the substrate between the gates; forming an isolation material layer inside the opening; performing a first chemical mechanical polishing on the top of the floating gate and the top of the isolation material layer to planarize the upper surface of the floating gate; removing The isolation material layer between the floating gates, the isolation material layer in the substrate forms an isolation structure; an insulating layer is formed on the side wall, upper surface and surface of the isolation structure of the floating gate. Due to the high flatness of the upper surface of the floating gate, the thickness of the insulating layer formed on the upper surface of the floating gate is uniform, so that the local electric field strength near the insulating layer is close to that of other regions, which can improve the ability of the floating gate to hold charges.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a memory. Background technique [0002] With the development of the times, the storage of information is becoming more and more important. Non-volatile memory is a more commonly used information memory, which stores 0 / 1 information by storing charges on the floating gate. The non-volatile memory can also resist magnetic interference well when there is no electricity to maintain it, so the non-volatile memory is widely used. [0003] Tunnel oxide layer non-volatile memory (Eprom Tannel Oxide, ETOX) is a more commonly used non-volatile memory. ETOX includes control gate, floating gate, gate oxide layer of floating gate, control gate floating gate insulating layer and source region , Drain region, by applying a voltage to the control gate, the electrons in the source region reach the floating gate under the effect of tunnel effect to realize the write op...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11521
CPCH10B41/00
Inventor 邹陆军李绍彬仇圣棻
Owner SEMICON MFG INT (SHANGHAI) CORP
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