Preparation method of shallow trench isolation structure

Abstract

The invention provides a preparation method of a shallow trench isolation structure. After a linear oxidation layer is formed in a trench, a linear amorphous silicon layer is introduced to consume H2O and other oxygen-containing groups generated in a subsequent water steam annealing step for an isolation medium layer, and diffusion of the formed H2O and the other oxygen-containing groups to a semiconductor substrate is further stopped; during water steam annealing of the linear amorphous silicon layer, the semiconductor substrate on the side wall of the trench is replaced, and the H2O and the other oxygen-containing groups are consumed and completely converted into SiO2 to be part of the isolation medium layer in the trench, so that oxidation of a boundary of an active area of the side wall of the trench in the water steam annealing process can be avoided, the material consumption of the semiconductor substrate on the side wall of the trench is reduced, the decrease of the critical dimensions (AA CD) of the active area is reduced, and meanwhile, the defect of forming of a cavity or a gap inside an isolation medium filled in the trench is avoided.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for preparing a shallow trench isolation structure. Background technique [0002] With the development of integrated circuits, modern CMOS chips usually integrate millions of active devices (ie, NMOS transistors and PMOS transistors) on a common silicon substrate material, and then realize various complex circuits through specific connections. Logic functions or analog functions, except for these specific functions, in the design process of the circuit, it is usually assumed that there is generally no other interaction between different devices. Therefore, it is necessary to be able to isolate devices in integrated circuit manufacturing, which requires isolation technology. [0003] With the development of devices to deep sub-micron, the isolation technology has developed from a local oxidation (Local Oxidation of Silicon, LOCOS) process to a shallow trench is...

AI Technical Summary

Problems solved by technology

[0006] Since water vapor annealing will oxidize the silicon substrate of the semiconductor substrate (trench sidewall) while eliminating cracks or voids in the HARP process, the Si in the active area (Active Area) will be consumed, resulting in active The critical dimension (Critical Dimension) of the region is reduced, which makes it difficult to control the critical dimension (CD) of the active region in the subsequent process. The reduction of the critical dimension of the active region will affect the saturation current of the device, and then affect the performance of the entire device.

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