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Semiconductor package and manufacturing method thereof

A packaging method and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the problems of wire offset, complicated process, wear and tear, etc., to prevent wire offset and simplify the process Effect

Active Publication Date: 2015-08-19
CHIPMOS TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This method not only requires a special machine, but the process is complicated, and it is easy to cause wire sweep. When the packaging material is subsequently cut, the tool will contact the metal layer, which is easy to produce burrs or cause tool wear.

Method used

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  • Semiconductor package and manufacturing method thereof
  • Semiconductor package and manufacturing method thereof
  • Semiconductor package and manufacturing method thereof

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Embodiment Construction

[0029] In order to make the advantages, spirit and characteristics of the present invention more easily and clearly understood, the following will be described and discussed in detail with reference to the accompanying drawings. It should be noted that these embodiments are only representative embodiments of the present invention, and the specific methods, devices, conditions, materials, etc. exemplified therein are not intended to limit the present invention or the corresponding embodiments.

[0030] The semiconductor packaging structure of the present invention and the embodiment described later are mainly aimed at the packaging of magnetoresistive random access memory chips (MRAM). However, they are not limited to this kind of chip packaging. Any chip that needs magnetic shielding can be used. Utilize the packaging structure and method of the present invention.

[0031] Please refer to Figure 1 to Figure 5 , which shows a schematic cross-sectional view of each process step...

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Abstract

A semiconductor package and manufacturing method thereof are disclosed. The semiconductor package includes a package carrier, a chip, a film, a first shielding metal plate and an encapsulating material. The package carrier has at least one conductive component. The chip has an active surface and a corresponding back surface. The back surface of the chip is attached to the package carrier. At least one contact point is disposed on the active surface and is electrically coupled to the conductive component by a wire. The film is disposed on the active surface and covers a portion of the wire. The first shielding metal plate is disposed on the film. The encapsulating material covers the chip, the wire, at least one portion of the package carrier, the film and at least one portion of the first shielding metal plate.

Description

technical field [0001] The invention relates to a semiconductor package and its method, in particular to a magnetoresistance random access memory chip package and its method. Background technique [0002] The magnetoresistive random access memory chip mainly uses the spin characteristics of electrons to record the "0" and "1" of the signal through the magnetoresistance change produced by the magnetization direction of the free layer in the magnetic structure. The basic principle of its operation Like storing data on a hard disk, the stored data is permanent, and the magnetic data will not be changed until it is affected by an external magnetic field. Its characteristics of low power consumption and fast response are the same as those of static random access memory (SRAM), and its high degree of integration is the same as that of dynamic random access memory (DRAM). In other words, MRAM has the common advantages of SRAM and DRAM, and the opportunity for MRAM to be widely use...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/60H01L23/495H10N50/80H10N50/01H10N50/10
CPCH01L43/12H01L43/02H01L43/08H01L2224/32245H01L2224/45139H01L2224/45144H01L2224/45147H01L2224/48091H01L2224/48247H01L2224/73265H10N50/80H10N50/10H01L2924/00014H01L2924/00
Inventor 周世文
Owner CHIPMOS TECH INC