A method of manufacturing a semiconductor device

Abstract

The invention provides a manufacture method of a semiconductor device, relating to the technical field of semiconductors. A natural silicon oxide layer at the surface of a semiconductor substrate is removed by SiCoNo etching, so that the etching load effect can be reduced, it is ensured that the size and appearance of SiGe layers are basically the same, and thus, the yield rate of the semiconductor device can be improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for manufacturing a semiconductor device. Background technique [0002] In the field of semiconductor technology, for advanced semiconductor technology, stress engineering has become one of the most important factors for device performance improvement. For PMOS, silicon germanium (SiGe) can improve carrier mobility by applying compressive stress to the channel. In addition to the growth of SiGe, the morphology of the trenches used to accommodate SiGe is critical for stress engineering. [0003] GeSi deposition is a selective growth that only grows on silicon (Si) material. In order to avoid the growth of silicon germanium on the NMOS, it is necessary to form a silicon germanium shielding layer in the NMOS region. Silicon nitride (SiN) and silicon oxide (SiO 2 ) can be used as a masking layer; since silicon oxide is easily removed and unstable in the wet proces...

AI Technical Summary

Problems solved by technology

And this will cause three problems: first, the etching loading effect of the oxide layer in the germanium-silicon masking layer (loading effect; refers to the density of the etched material or the opening of the gate spacing during etching. The phenomenon that the etch rate of the smaller area is slower than that of the smaller area or the area with larger gate spacing), which will cause the loading effect of the silicon germanium trench; second, the load of the shallow trench isolation (STI) loss effect, which will affect subsequent processes (such as TiN loss); third, more shallow trench isolation (STI) losses, which will affect subsequent processes (such as TiN loss)

It can be seen that in the existing manufacturing method of semiconductor devices, there is a load effect on the etching of the oxide layer in the silicon-germanium shielding layer, which will cause the morphology of the silicon-germanium layer to be different in different regions, resulting in a good quality of the entire semiconductor device. rate drop

Images