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A kind of semiconductor device and its preparation method, electronic device

A technology of electronic devices and semiconductors, applied in semiconductor devices, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as difficult removal, device performance and yield reduction, damage, etc., to avoid residue, performance and yield improvement, and expand process window effect

Active Publication Date: 2018-05-08
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The FinFET device as figure 1 As shown, the gate structure 102 is arranged around the fin 101, and the LDD diffusion length is controlled by the spacer 103 on the sidewall of the gate structure, but in the process of forming the spacer 103, It will also be formed on the sidewall of the fin 101, and the residual spacer 103' is not easy to remove, and the removal will also cause damage to the spacer 103 on the sidewall of the gate structure 102, because the residual spacer 103' The existence of bridging is easy to occur when the epitaxial semiconductor layer 104 is formed on the fin 101, which reduces the performance and yield of the device

Method used

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  • A kind of semiconductor device and its preparation method, electronic device
  • A kind of semiconductor device and its preparation method, electronic device
  • A kind of semiconductor device and its preparation method, electronic device

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Embodiment 1

[0048] In order to solve the problems existing in the prior art, the present invention provides a new semiconductor device preparation method, combined below Figure 2a -i further explains the preparation method of the semiconductor device of the present invention, wherein a top view is provided in the figures, along X-X' and along Y-Y' directions:

[0049]First, step 201 is performed to provide a semiconductor substrate on which fins 20 are formed.

[0050] Specifically, such as Figure 2a As shown, a semiconductor substrate 202 is first provided, and the semiconductor substrate is formed on a base 201. The semiconductor substrate 202 can be at least one of the materials mentioned below: silicon, silicon-on-insulator, SiGe, etc., Other active devices may also be formed in the semiconductor substrate.

[0051] Optionally, the semiconductor substrate 202 in this embodiment is a silicon substrate.

[0052] A patterned mask layer is formed on the semiconductor substrate 202, t...

Embodiment 2

[0099] The present invention also provides a semiconductor device, which is prepared by the method described in Embodiment 1. In the method, the fins are covered with a sacrificial material layer, and the spacer pattern is obtained by patterning, and finally the spacer is filled to obtain the spacer, which avoids damage to the fin when removing the residual spacer in the prior art. and damage to the spacer wall. The spacer of the semiconductor device prepared by the method of the invention does not remain and is not damaged, which improves the performance and yield of the semiconductor device.

Embodiment 3

[0101] The present invention also provides an electronic device, including the semiconductor device described in Embodiment 2. Wherein, the semiconductor device is the semiconductor device described in Embodiment 2, or the semiconductor device obtained according to the preparation method described in Embodiment 1.

[0102] The electronic device of this embodiment can be any electronic product or equipment such as mobile phone, tablet computer, notebook computer, netbook, game console, TV set, VCD, DVD, navigator, camera, video recorder, voice recorder, MP3, MP4, PSP, etc. , can also be any intermediate product including the semiconductor device. The electronic device according to the embodiment of the present invention has better performance due to the use of the above-mentioned semiconductor device.

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PUM

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Abstract

The invention relates to a semiconductor device, a preparation method thereof, and an electronic device. The method includes providing a semiconductor substrate, on which a plurality of fins are formed, and a plurality of layers comprising a gate material are formed above the fins in a direction perpendicular to the direction in which the fins extend. and a strip stack of mask layers; deposit a sacrificial material layer to fill the gaps on both sides of the strip stack; pattern the sacrificial material layer in the direction of the strip stack to form a trenches on both sides of the stack, the trenches completely expose the sidewalls of the strip stack; deposit a spacer material layer and planarize to the sacrificial material layer to fill the trenches, in the A spacer is formed on the sidewall of the strip stack; the sacrificial material layer is removed to expose the spacer. The advantages of the present invention are: (1) the step of etching and removing the spacer is avoided through the patterning method of the spacer, and the process window is enlarged.

Description

technical field [0001] The present invention relates to the field of semiconductors, in particular, the present invention relates to a semiconductor device, a preparation method thereof, and an electronic device. Background technique [0002] The improvement of integrated circuit performance is mainly achieved by continuously shrinking the size of integrated circuit devices to increase its speed. Currently, as the semiconductor industry in pursuit of high device density, high performance, and low cost has evolved to smaller technology process nodes, manufacturing and design challenges have promoted the development of three-dimensional designs such as Fin Field Effect Transistors (FinFETs). [0003] Compared with the existing planar transistors, the FinFET device has more superior performance in terms of channel control and reduction of shallow channel effects; wherein, the planar gate structure is arranged above the channel, and the FinFET described The grid is arranged aro...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L29/78
Inventor 曾以志
Owner SEMICON MFG INT (SHANGHAI) CORP