System on chip and memory access management method thereof

A system-level chip and management method technology, applied in the field of system-level chip and its memory access management, can solve the problems of lack of memory sharing, high power consumption, and increased SOC power consumption, so as to improve software fault tolerance and application flexibility performance, reducing area overhead, and reducing power consumption overhead

Inactive Publication Date: 2016-02-03
CHINA ACAD OF TELECOMM TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] 1. Large area overhead: There is no memory sharing between different processor subsystems, resulting in memory occupying 60% or even more than 70% of the SOC area, which brings a large area overhead and has no cost advantage;
[0008] 2. High power consumption overhead: There is no memory sharing between different processor subsystems, and the communication between processor subsystems is carried out through memory copy. A large number of memory copies lead to a sharp increase in SOC power consumption;
[0009] 3. Unable to achieve shared memory management: in the prior art, there is a shared memory design between different processor subsystems, but shared memory cannot achieve memory consistency management, and can only be operated by software Cache of different processor subsystems. Interrupts are used between subsystems to maintain memory consistency, which makes the overhead of software maintaining memory consistency relatively large, and the application is inflexible and the software has poor fault tolerance.
[0010] To sum up, when there is no memory sharing between different processor subsystems in the existing SOC, the area of ​​memory in the SOC is expensive, and the communication between different processor subsystems through memory copy greatly increases the capacity of the SOC. Power consumption overhead. In the existing SOC, when there is memory sharing between different processor subsystems, there is a lack of unified management, which leads to a large cost of maintaining memory consistency in the SOC and affects the performance of the SOC.

Method used

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  • System on chip and memory access management method thereof
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  • System on chip and memory access management method thereof

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Embodiment Construction

[0030] The specific implementation manners of the system-on-a-chip and the memory access management method provided by the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0031] Due to the relatively large area of ​​the CPU storage subsystem and the GPU storage subsystem, when the SOC provided by the embodiment of the present invention is described below in conjunction with the accompanying drawings, the processor subsystem included in the SOC takes the CPU subsystem and the GPU subsystem as examples. Of course, The SOC provided by the embodiment of the present invention may also include other types of processor subsystems.

[0032] A system-on-a-chip provided by an embodiment of the present invention, such as figure 2 As shown, including: multiple processor subsystems and shared memory shared between multiple processor subsystems, the multiple processor subsystems include such as figure 2 Shown in the CP...

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Abstract

The invention provides a system on chip SOC and a memory access management method thereof, and aims at realizing the memory sharing of different processor subsystems in the SOC, and carrying out consistency management on a shared memory among the processor subsystems, so as to reduce the area and the power consumption of the SOC and realize the uniform management of the shared memory. The system on chip comprises the processor subsystems, the shared memory and a system memory management unit MMU, wherein the system MMU is connected between the processor subsystems and the shared memory and used for managing the access from the processor subsystems to the shared memory.

Description

technical field [0001] The invention relates to the technical field of communication, in particular to a system-level chip and a memory access management method thereof. Background technique [0002] Modern system-on-chip (SystemOnChip, SOC) usually integrates a variety of different types of processors, including central processing unit (Central Processing Unit, CPU) / micro control unit (MicroControl Unit, MCU), graphics processing unit (Graphic Processing Unit, GPU), digital signal Processing (DigitalSignalProcessor, DSP) and multimedia core, etc. According to the respective characteristics and unique performance of the processors, it is ensured that the corresponding tasks are allocated to the most efficient processors to complete, so that the performance and efficiency of the SOC are improved, and this SOC composed of a variety of different types of processors The performance and efficiency far exceed the SOC formed by a single processor. For example, audio and object ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/163G06F12/08
CPCY02D10/00
Inventor 陆会贤
Owner CHINA ACAD OF TELECOMM TECH
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