Manufacturing method of semiconductor device and electronic device

Abstract

The invention provides a manufacturing method of a semiconductor device and an electronic device and relates to the technical field of semiconductors. The manufacturing method of the semiconductor device comprises the following steps: forming a second mask including first patterns corresponding to control gates and second patterns corresponding to a selection gate; forming a third mask between two adjacent second patterns corresponding to the same selection gate; carrying out patterning on a first hard mask layer by the first patterns, the second patterns and the third mask; and carrying out etching to form the control gates and the selection gate by the patterned first mask layer. According to the method, the second patterns and the first patterns are formed in the same patterning process, so that the distance between each selection gate and a cell region can be well controlled; the threshold voltage uniformity of cells can be improved; and interference can be reduced, so that the performance and the yield of the semiconductor device can be improved. The electronic device provided by the invention comprises the semiconductor device manufactured by the method. Therefore, the electronic device has the same advantages.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a manufacturing method of a semiconductor device and an electronic device. Background technique [0002] In the field of semiconductor technology, a NAND device generally includes a control gate 1021 located in a cell region (cell) and a selection gate 1022 located in a peripheral region, such as Figure 1A shown, and typically also includes a floating gate ( Figure 1A not shown). In the manufacturing process of NAND, the gate (including the control gate and the floating gate) located in the cell region (cell) of the NAND device and the select gate located in the peripheral region are generally manufactured using different mask processes. The gate located in the cell area is usually manufactured by self-aligned double patterning (SADP) due to its relatively small size, and the select gate located in the peripheral area is usually manufactured by a common mask process due ...

AI Technical Summary

Problems solved by technology

That is to say, the existing manufacturing method of semiconductor device cannot well control the distance between the selection gate and the unit area (cell)

Failure to properly control the distance between the select gate and the cell will affect the uniformity of the threshold voltage (Vt) of the cell and cause disturbance to the device, thereby affecting the yield and performance of the semiconductor device.

[0005] It can be seen that the existing manufacturing method of semiconductor devices has the problem that it is difficult to well control the distance between the selection gate and the cell region, which will affect the uniformity of the threshold voltage of the cell and cause interference to the device, thereby affecting the performance of the semiconductor device. Yield and Performance

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