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Array substrate, display panel and display apparatus

An array substrate and substrate technology, applied in electrical components, electrical solid devices, circuits, etc., can solve the problems of charge residue, affecting TFT characteristics, and difficult to remove.

Active Publication Date: 2016-02-24
XIAMEN TIANMA MICRO ELECTRONICS +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Embodiments of the present invention provide an array substrate, a display panel, and a display device, which can solve the problem in the prior art that charges remain in the silicon nitride layer of the interlayer insulating layer and are difficult to remove, thereby affecting TFT characteristics and degrading display quality.

Method used

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  • Array substrate, display panel and display apparatus
  • Array substrate, display panel and display apparatus
  • Array substrate, display panel and display apparatus

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Embodiment 1

[0029] Please refer to figure 2 , figure 2 This is a partial cross-sectional view of an array substrate 200 according to an embodiment of the present invention. The array substrate 200 includes a substrate 10, and a buffer layer 11, a semiconductor layer 12, a gate insulating layer 13, a gate electrode 15, an interlayer insulating layer 14, and a source electrode 161 sequentially arranged in a direction perpendicular to the substrate 10. And drain electrode 162.

[0030] The substrate 10 is mainly made of glass, but may also be curved transparent plastic, such as polyimide. If a curved transparent plastic is used as the material of the substrate 10, considering that the process of high-temperature deposition is performed on the substrate 10, polyimide with excellent heat resistance can be used (polyimide can withstand high temperature ).

[0031] The buffer layer 11 includes a fourth silicon nitride layer and a second silicon dioxide layer (not shown in the figure) that are sta...

Embodiment 2

[0040] Please refer to Image 6 , Image 6 It is a partial cross-sectional view of another array substrate 300 provided by an embodiment of the present invention. The structure of the array substrate 300 in this embodiment is basically the same as that of the array substrate 200 in the embodiment 1, except that the interlayer insulating layer 14 includes first layers arranged in a vertical direction from the bottom to the top. The silicon nitride layer 141, the second silicon nitride layer 143, the first silicon oxide layer 142, and the third silicon nitride layer 144. The relative dielectric constant of the third silicon nitride layer 144 is greater than or equal to 6.5, which can reduce damage to the underlying interlayer insulating layer and charge injection by the electric field generated during film formation, etching, and cleaning.

Embodiment 3

[0042] Please refer to Figure 7 , Figure 7 It is a schematic structural diagram of a display panel 20 provided by an embodiment of the present invention. The display panel 20 includes an array substrate 21 and a counter substrate 23 arranged opposite to the array substrate 21, and a liquid crystal layer 22 located between the array substrate 21 and the counter substrate 23. Wherein, the array substrate 21 is the array substrate described in the foregoing embodiments.

[0043] The display panel provided in this embodiment adopts the array substrate of each of the above-mentioned embodiments, and the interlayer insulating layer of the array substrate at least includes the first silicon nitride layer and the first silicon nitride layer sequentially arranged in a vertical direction from the bottom to the top of the array substrate. The second silicon nitride layer and the first silicon oxide layer, and the hydrogen atom percentage content of the first silicon nitride layer is gre...

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PUM

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Abstract

The invention discloses an array substrate, a display panel and a display apparatus. The array substrate comprises a substrate, a gate electrode and a semiconductor layer positioned on the substrate, an inter-layer insulating layer covering the gate electrode and the semiconductor layer, and a source electrode and a drain electrode positioned on the inter-layer insulating layer, wherein the inter-layer insulating layer comprises a first silicon nitride layer, a second silicon nitride layer and a first silicon oxide layer that are arranged in sequence from the bottom up along a direction perpendicular to the substrate; and percent content of hydrogen atoms of the first silicon nitride layer is greater than that of the second silicon nitride layer. A large amount of defects and residual charges in the interface between the first silicon nitride layer and the first silicon oxide layer are avoided, so that the TFT electric performance is improved, and the display quality is improved.

Description

Technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate, a display panel and a display device. Background technique [0002] Thin Film Transistor (TFT) has been widely used in flat panel display technology such as liquid crystal display devices and organic light-emitting display devices. Taking active matrix liquid crystal display devices as an example, TFT is used as a liquid crystal display in liquid crystal display devices. The pixel switching element of the panel. Among them, the TFT has a gate electrode, a drain electrode, a source electrode and a semiconductor layer. The gate electrode is electrically connected to the gate line and controlled to be turned on. The source electrode is electrically connected to the data line to receive signals, and the drain electrode is The pixel electrodes are electrically connected to change the transmittance of each pixel of the liquid crystal display panel to achieve th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/12
CPCH01L27/1248
Inventor 陈伟绩王磊郑焜泰赖大琪
Owner XIAMEN TIANMA MICRO ELECTRONICS
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