FPGA-based BCH encoding and decoding device and encoding and decoding method thereof

Abstract

The invention discloses an FPGA-based BCH encoding and decoding method comprising the following steps: a receiving module receives signal data and sends the signal data to a BCH encoding module, the BCH encoding module encodes the signal data in a segmented manner to get r bit check digits corresponding to the signal data, and the signal data and the bit check digits are stored in a storage module; after the signal data and the parity bits are acquired from the storage module, BCH decoding is performed to get a code word polynomial R(x), Q syndromes of the code word polynomial R(x) are obtained on the basis, and an error location polynomial of error of the signal data in the storage process is obtained; and the root of the error location polynomial is solved according to the error location polynomial of error of the signal data in the storage process and a money search traversal algorithm, and the error data bit of the signal data in the storage process is corrected to get correct signal data stored in the storage module.

Description

technical field [0001] The invention belongs to the technical field of error checking and correction (ECC) verification of storage system data, and in particular relates to an FPGA-based BCH codec device and a codec method thereof, that is, a field-programmable logic gate array (FPGA)-based The linear cyclic code coding and decoding device and its coding and decoding method are suitable for reliable storage of data signals in a storage system. Background technique [0002] With the development of the manufacturing process and storage unit architecture of NAND flash memory, the probability of bit errors in the NANDFLASH storage medium of NAND flash memory has greatly increased. The main reason for “bit exchange” is the drift effect, that is, the voltage in the NAND FLASH storage medium gradually changes, resulting in a logical exchange of data stored in the NAND FLASH storage medium. The development of chip manufacturing technology and architecture enables a storage unit to s...

AI Technical Summary

Problems solved by technology

[0003] At present, the number of data encoding bits of the error correction code is small, the serial coding efficiency is low, and the number of error correction bits is small, and the early Hamming code has been unable to meet the requirements of the NANDFLASH storage medium for error correction capability. Its special physical structure determines the NANDFLASH ( flash memory) storage media prone to random errors

Images