synchronous dynamic random access memory

Abstract

The invention provides a synchronous dynamic random access memory. The synchronous dynamic random access memory comprises a resistor module, a mode register, a decoder and at least one logic control module, wherein the resistor module is arranged on a signal wire in the synchronous dynamic random access memory and comprises an adjustable first terminating resistor; the mode register is used for controlling the operation mode of the synchronous dynamic random access memory; the decoder is used for acquiring a configuration signaling of the mode register according to a received control signal; the logic control module is used for decoding according to the received control signal of the terminating resistor and regulating the size of a first terminating resistance according to the configuration signaling. According to the synchronous dynamic random access memory, the integrity of data signals in a dynamic random access memory of an embedded system and the stability of the system are improved.

Description

technical field [0001] The invention relates to the field of memory, in particular to a synchronous dynamic random access memory. Background technique [0002] Synchronous Dynamic Random Access Memory (Synchronous Dynamic Random Access Memory, SDRAM) is used as the cache of the microprocessor, the working speed is synchronized with the speed of the system bus, and the data retention time in the cache space is short. Dynamic random access memory (Dynamic Random Access Memory, DRAM) can be divided into SDRAM, double rate synchronous dynamic random access memory (Double Data Rate SDRAM, DDRSDRAM), DDR2 SDRAM, DDR3 SDRAM, etc. DDR2 SDRAM is the second generation of double data rate synchronous dynamic random access memory. Compared with DDR SDRAM, it has higher operating efficiency, lower voltage and lower power consumption. Under the same core frequency of the system controller, the timing operating frequency of DDR2 It is twice that of DDR and is based on the development of D...

AI Technical Summary

Problems solved by technology

[0005] Due to differences in PCB technology in actual printed circuit board (PCB) design, differences in PCB parameters of different boards, differences in PCB design stackup, and differences between chips, it is difficult to adapt to the existing few fixed ODT termination resistors. Due to the discrete factors of impedance in the above-mentioned situations, there are differences in the impedance of different data lines in the PCB and the same data line in different PCBs. The data buses of different data bits have different signal reflections and different signal delays, which are prone to system failure. Unscheduled hangs or even does not start, affecting the stability of the system

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