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Power good signal output method and device

A signal output and signal technology, which is applied in the field of good power signal output methods and devices, can solve problems such as affecting the accuracy of power supply status judgment, affecting the overall performance of display driver chips, and protecting circuit misoperations, so as to solve competition and risk-taking problems. , the effect of eliminating burr phenomenon, zero power consumption static current

Active Publication Date: 2020-09-25
GALAXYCORE SHANGHAI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0012] It can be seen that due to the competition and risk problems caused by the different delays of the enable switch and the judgment module, there will be glitches in the actual response output (t1-t2 stage), which will affect the judgment accuracy of the power supply status, and will cause subsequent protection circuits. Misoperation, which will affect the overall performance of the display driver chip

Method used

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  • Power good signal output method and device
  • Power good signal output method and device
  • Power good signal output method and device

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Embodiment 1

[0064] FIG. 6(A) shows the circuit diagram of the power good signal output subunit of Embodiment 1 of the present invention, and FIG. 6(B) shows the effect diagram of the power good signal output subunit of Embodiment 1 of the present invention.

[0065] As shown in Figure 6 (A), the power good signal output subunit of the present invention includes a voltage divider module 121 with an enable switch 124, a forward judgment module 122 and a logic AND gate 123, wherein the input power supply voltage VDDN is Positive value means that the enable switch 124 is close to the high potential end, that is, the power supply voltage end (VDDN end).

[0066] Wherein, the voltage dividing module 121 converts the input power supply voltage VDDN into a detection divided voltage VDDN' that can be judged by resistive voltage division. Since the enable switch 124 is provided in the voltage divider module 121 in response to the enable signal EN, the static power consumption of the voltage divider...

Embodiment 2

[0075] FIG. 7(A) shows the circuit diagram of the power good signal output subunit of the second embodiment of the present invention, and FIG. 7(B) shows the effect diagram of the power good signal output subunit of the second embodiment of the present invention.

[0076] As shown in Figure 7 (A), the power good signal output subunit of the present invention includes a voltage divider module 221 with an enable switch 224, a reverse judgment module 222 and a logic AND gate 223, wherein the input power supply voltage VDDN is Positive value means that the enable switch 224 is close to the low potential end, that is, the ground end (GND end).

[0077] Wherein, the voltage dividing module 221 converts the input power supply voltage VDDN into a detection divided voltage VDDN' that can be judged by dividing the voltage by resistors. Since the voltage divider module 221 is provided with an enable switch 224 responsive to the enable signal EN, the static power consumption of the voltag...

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Abstract

The invention provides a power good signal output method and a power good signal output device. The power good signal output device comprises a voltage dividing module, a forward direction judgment module or a reverse direction judgment module, a logic and gate, wherein the voltage dividing module is provide with an enable switch and is used for converting an input power supply voltage into a detection divided voltage to be judged, and the enable switch responds to an enable signal; the detection divided voltage is judged by means of the forward direction judgment module when the enable switch is connected to a position closed to a high potential end in the voltage dividing module, the detection divided voltage is judged by means of the reverse direction judgment module when the enable switch is connected to a position closed to a low potential end in the voltage dividing module, and a marking signal is output; and the logic and gate is used for processing the enable signal and the marking signal, and outputting a power good signal. The power good signal output method and the power good signal output device can achieve zero-power-consumption static current in a deep sleep or shutdown mode, can solve the competition and risk problems caused by different time delay of the enable switch and the judgment module, eliminates burr phenomenon in actual response output, and increases judgment accuracy of a power good state.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a power good signal output method and device. Background technique [0002] With the increasing popularity of smart phones, people have higher and higher requirements for the display effect of mobile smart terminals, and the display effect of wide screen and high resolution with high performance has become the mainstream. Therefore, more and more challenges are raised to the functions and performance of the display driver chip of the handheld device. [0003] The charge pump in the multi-output power management unit, which is very important in the display driver chip, provides positive and negative bias voltages for the liquid crystal. During the process of power-on or power-off, the charge pump module needs to be charged and discharged for several clock cycles to achieve Therefore, it is particularly important to detect the states of the multiple positive and negative output ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G09G3/20
CPCG09G3/2077
Inventor 张科王富中丁启源
Owner GALAXYCORE SHANGHAI
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