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Temporary Bonding Method for Chemical Mechanical Polishing of Wafer Scale Ultrathin Silicon Wafers

A chemical-mechanical, wafer-level technology, applied in opto-mechanical equipment, metal processing machinery parts, optics, etc., can solve the problems of fragile, difficult to hold ultra-thin silicon wafers, and reduce processing errors and unevenness. The effect of reducing the cost of the process

Active Publication Date: 2017-06-16
XIAMEN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] The purpose of the present invention is to solve the above-mentioned problems existing in the existing ultra-thin silicon wafer temporary bonding method, and to provide not only the problem that the ultra-thin silicon wafer is difficult to clamp and easily broken during the chemical mechanical polishing process, but also can effectively reduce the ultra-thin silicon wafer. Temporary bonding method for chemical mechanical polishing of wafer-scale ultra-thin silicon wafers accumulating processing errors during subsequent wafer polishing

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  • Temporary Bonding Method for Chemical Mechanical Polishing of Wafer Scale Ultrathin Silicon Wafers
  • Temporary Bonding Method for Chemical Mechanical Polishing of Wafer Scale Ultrathin Silicon Wafers
  • Temporary Bonding Method for Chemical Mechanical Polishing of Wafer Scale Ultrathin Silicon Wafers

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Embodiment Construction

[0026] The following examples take a 3" ultra-thin silicon wafer with a final thickness of 75 ± 3 μm as an example. After chemical thinning, the thickness of the thin silicon wafer is 83 ± 3 μm. After the thin silicon wafer is temporarily bonded, it is chemically mechanically polished, and obtained after degumming. Ultra-thin silicon wafers.

[0027] see Figure 1~5 The temporary bonding method for chemical mechanical polishing wafer-level ultra-thin silicon wafers described in the embodiment of the present invention includes the following steps:

[0028] (1) Thermal oxidation, epitaxial layer of SiO with a thickness of 300nm on the carrier sheet 1 2 Film 2. see figure 1 (a);

[0029] (2) The position of the overflow groove is photoetched, and the photoresist 3 is used as a mask to wet-etch SiO 2 . see figure 1 (b);

[0030] (3) Remove the photoresist and use SiO 2 As the mask layer, the mass percent concentration is 60% KOH, the temperature is 78°C, the ultrasonic fr...

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Abstract

The invention discloses a temporary bonding method for a wafer-level ultra-thin silicon wafer in chemical-mechanical polishing, and relates to the field of a semiconductor technology and micro-manufacturing. Three sections of equal-diameter concentric arc grooves with the outer diameter slightly larger than that of the ultra-thin silicon wafer are formed in a bearing piece through processing, and three sections of overflow grooves are formed and are connected with the arc grooves; a spin-coating method is adopted, and an adhesive is applied to bottoms of the arc grooves, so that the arc grooves can locate and bear the ultra-thin silicon wafer; the overall silicon wafer is subjected to hot pressing; after subsequent chemical-mechanical polishing of the ultra-thin silicon wafer is completed, a cooled sulfuric acid and hydrogen peroxide mixed liquid and hot acetone are adopted successively, and the adhesive can be completely dissolved and removed, so that damage-free and stress-free separation between the ultra-thin silicon wafer and the bearing piece is realized; not only can the problems that the ultra-thin silicon wafer is difficult to clamp and easy to damage in the chemical-mechanical polishing process be solved, but also accumulative processing errors of the ultra-thin silicon wafer during subsequent polishing can be effectively reduced, and the technological cost is remarkably reduced.

Description

technical field [0001] The invention relates to the fields of semiconductor technology and micromanufacturing, in particular to a temporary bonding method for chemical mechanical polishing of wafer-level ultra-thin silicon wafers. Background technique [0002] Ultra-thin silicon wafers (thickness ≤ 80 μm) are widely used in micro-nano materials and devices such as radio frequency identification tags, subretinal implantation technology, micro-energy systems, and device packaging, and have a crucial impact on their performance. Thinning silicon wafers physically or chemically, and then polishing the surface of the thinned silicon wafers by chemical mechanical polishing technology is currently the preferred solution for preparing ultra-thin silicon wafers. Compared with the preparation of standard silicon wafers, the yield of ultra-thin silicon wafers is low, and one of the important reasons is that it is difficult to clamp ultra-thin silicon wafers after thinning. In the chem...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): B81C3/00
CPCB81C3/001
Inventor 曾毅波郭航
Owner XIAMEN UNIV