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Surface treatment method for crystalline silicon body life test

A technology of surface treatment and body life, applied in semiconductor/solid state device testing/measurement, semiconductor/solid state device manufacturing, electrical components, etc. Achieve good reproducibility and stability

Inactive Publication Date: 2016-08-03
LONGI GREEN ENERGY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

A commonly used method is passivation with ethanol solution of iodine (I-E). The silicon wafers processed by this method are easily oxidized after passivation, resulting in poor stability and non-reproducibility of the test.

Method used

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  • Surface treatment method for crystalline silicon body life test
  • Surface treatment method for crystalline silicon body life test
  • Surface treatment method for crystalline silicon body life test

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0023] The surface treatment method for crystalline silicon life test provided by the present invention comprises the following steps:

[0024] First, a crystalline silicon wafer is provided. Crystalline silicon wafers can be n-type or p-type. In this embodiment, a p-type crystalline silicon wafer is provided with a resistivity of 1.8 Ω·cm, a thickness of 140 μm, and a size of 156×156 mm. The other monocrystalline silicon wafer is n-type, its resistivity is 5.5Ω·cm, its thickness is 190μm, and its size is also 156×156mm.

[0025] Then, the two crystalline silicon wafers are subjected to damage removal treatment. Specifically, a potassium hydroxide solution with a mass concentration of 30%-60% and a temperature of 75-85°C is provided, and the crystalline silicon wafer is immersed in the aforementioned potassium hydroxide solution for 8-15 minutes and then rinsed to remove attached particles and oil stains etc., and remove the damaged layer.

[0026] Secondly, clean the two ...

Embodiment 2

[0033] This embodiment provides a p-type crystalline silicon wafer with a resistivity of 1.5 Ω·cm, a thickness of 190 μm, and a size of 156×156 mm. In this embodiment, the p-type crystalline silicon wafer is evenly divided into two small crystalline silicon wafers, and one small crystalline silicon wafer is subjected to damage layer removal, cleaning and passivation at one time using substantially the same method as in the first embodiment. Another small crystalline silicon wafer was de-damaged, cleaned, and passivated with 0.08mol / L iodine ethanol solution (I-E) using conventional methods, sealed in a self-sealing bag, and the center was tested using WT1000 single-point test. The comparison of time changes is shown in the image 3 shown.

[0034] From image 3 It can be seen in the figure that using the conventional I-E passivation method, the test value decreases rapidly within 20 minutes of the test, and continues to decrease after 20 minutes. The test value is unstable a...

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Abstract

The surface treatment method for crystalline silicon life test disclosed by the invention comprises the steps of providing a crystalline silicon chip and passivating the crystalline silicon chip with a quinone compound. The surface treatment method for the life test of the crystalline silicon body of the invention solves the defects that the crystalline silicon is easily oxidized, the minority carrier life test is unstable and has no reproducibility existing in the existing surface treatment method for the life test of the crystalline silicon body. However, the crystalline silicon wafers treated by the surface treatment method for the life test of the crystalline silicon body of the present invention have the advantages of good stability and good reproducibility.

Description

technical field [0001] The invention belongs to the technical field of crystalline silicon detection, and in particular relates to a surface treatment method for crystalline silicon body life testing. Background technique [0002] Minority carrier lifetime (also known as minority carrier lifetime) is an important parameter of silicon crystal materials. It reflects the ability of non-equilibrium carriers generated by sunlight to reach the p-n junction. After the non-equilibrium carriers reach the p-n junction electric field, they are separated to generate photocurrent. The conversion efficiency of solar cells is directly related to the minority carrier lifetime of monocrystalline silicon (hereinafter referred to as bulk lifetime). Therefore, the bulk life becomes an important index to measure the quality of crystalline silicon. [0003] On the surface of a crystalline silicon wafer, defect levels are introduced by oxide layers, damaged layers, chemical residues, or deposit...

Claims

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Application Information

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IPC IPC(8): H01L21/02H01L21/66
Inventor 邓浩刘培东张骏凯李静王新强
Owner LONGI GREEN ENERGY TECH CO LTD