Semiconductor device, manufacturing method therefor, and electronic device

Abstract

The invention relates to a semiconductor device, a manufacturing method therefor, and an electronic device. The method comprises the following steps: S1, providing a semiconductor substrate which is provided with a patterned mask layer; S2, taking the mask layer as a mask for etching the semiconductor substrate, so as to form a plurality of fins on the semiconductor substrate, wherein a wet etching method is employed for the etching of the semiconductor substrate, and the etching liquid of the wet etching method contains protection reagent which forms a protection layer on side walls of the fins in a wet etching process. The method can be simpler and easier, cannot increase the technological steps, can reduce the damage caused by dry etching to the side walls of the fins, improves the performance and yield of the semiconductor device, and further reduces the technological cost.

Description

technical field [0001] The present invention relates to the field of semiconductor manufacturing, in particular, the present invention relates to a semiconductor device, a manufacturing method thereof, and an electronic device. Background technique [0002] The improvement of integrated circuit performance is mainly achieved by continuously shrinking the size of integrated circuit devices to increase its speed. Currently, as the semiconductor industry has advanced to nanotechnology process nodes in pursuit of high device density, high performance, and low cost, manufacturing and design challenges have prompted the development of three-dimensional designs such as Fin Field Effect Transistors (FinFETs). [0003] Compared with the existing planar transistors, the FinFET device has more superior performance in terms of channel control and reducing shallow channel effects; the planar gate structure is arranged above the channel, and the gate in the FinFET The fins are arranged a...

AI Technical Summary

Problems solved by technology

[0005] Further, the limitation of special silicon fin layout caused by photolithography restricts the flexibility of circuit design. In addition, in the process of etching the fins with the template as a mask, dry etching is usually selected, and the dry etching cannot Avoid damage to the fins, thereby affecting the yield and performance of the fabricated device

Images