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High speed output driver circuit

A technology for output drivers and circuits, applied in logic circuits, electrical components, pulse technology, etc., can solve problems such as accelerated current conversion rate, ground wire bounce, etc., to reduce switching time, reduce transmission delay, and high current drive effect of ability

Inactive Publication Date: 2016-09-28
SOUTHEAST UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, increasing the slew rate results in a faster current slew rate, which can cause the above side effects such as ground bounce in high-speed interfaces

Method used

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Experimental program
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Embodiment Construction

[0015] figure 1 It is the structure diagram of general output driver circuit. When the output of a circuit needs to drive a large load capacitance, in order to ensure that the circuit has a certain operating speed, the circuit must have a certain current output that can provide a large enough drive current. Because the delay time of the circuit can be approximately expressed by the following formula: t d ∝C L V 1 / I D , Where C L Is the load capacitance, V 1 Is the output voltage, I D Is the output drive current. In the case of a certain load capacitance and logic swing, to reduce the delay time of the circuit, the drive current of the MOS tube must be increased; to increase the drive current, only the aspect ratio of the output stage MOS tube must be increased, and this will increase The load capacitance of the previous stage affects the working speed of the previous stage. Therefore, when the load capacitance is large, such as a large fan-out or an external output terminal, ...

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Abstract

The invention discloses a high speed output driver circuit, comprising a prepositioned driving stage and a power tube driving stage. The high speed output driver circuit is characterized in that: between the input terminal IN of the prepositioned driving stage and the output OUT of the power tube driving stage, a driver circuit adopts the diversified technology of the signal path and the distributed and weighting switch driving technology; a signal goes through two different transmission paths for transmission from the input to the output; in the prepositioned driving stage, a combination of two groups of buffers which are different in sizes is adopted; a combination of two groups of output transistors which are different in sizes and correspond to the buffers in the prepositioned driving stage is adopted in the power tube driving stage; the output terminals of the two groups of output transistors are connected in parallel; the prepositioned driving stage activates the transistors of the output driving stage in sequence in order to reduce transmission time delay and reduce an output current changing rate di / di of an output signal changing from one logic state to another logic state while without reducing current driving capability of the output driver.

Description

Technical field [0001] The invention relates to an output driver, in particular to a high-speed output driver circuit, belonging to the technical field of integrated circuits. Background technique [0002] With the continuous development of submicron CMOS integrated circuit technology and the continuous improvement of the operating speed of CMOS devices, the operating speed of advanced CMOS devices has been developed to the 100MHz range. The high rate causes the current conversion rate di / dt to accelerate, and some side effects occur. Side effects include crosstalk, transmission line effects, power transients, and ground bounce. Integrated circuit input and output modules bear the responsibility of data communication inside and outside the chip, and its importance is self-evident. In the input and output module, the function of the output driver is to accept the data signal provided on the chip, and generate an output signal matching the external interface circuit to drive the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/0944
CPCH03K19/0944
Inventor 祝靖薛尚嵘张玉浩卜爱国孙伟锋陆生礼时龙兴
Owner SOUTHEAST UNIV