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LVDS (Low Voltage Differential Signaling) interface testing method and system based on FPGA (Field Programmable Gate Array)

An interface testing and interface technology, which is applied in fault hardware testing methods, error detection/correction, detection of faulty computer hardware, etc. Save test time, improve test flexibility and accuracy

Inactive Publication Date: 2016-11-16
FUZHOU ROCKCHIP SEMICON
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AI Technical Summary

Problems solved by technology

[0003] LVDS (Low Voltage Differential Signaling) is a low-voltage differential signal technology interface. It is a digital video signal developed to overcome the shortcomings of large power consumption and large EMI electromagnetic interference when transmitting broadband high-bit rate data in TTL level mode. transfer method
The existing test method is to first convert the LVDS signal into a 28-bit TTL parallel signal (24-bit video data and 4 line field signals) through a dedicated LVDS receiver, and then send the 24-bit video data to the processor itself in 3 times. The camera interface is stored in the RAM, and finally the video data in the RAM is read through the software, and the obtained video data is compared with the preset data to judge whether the LVDS interface is normal, so the implementation efficiency is low. , and it only tests the first complete signal received

Method used

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  • LVDS (Low Voltage Differential Signaling) interface testing method and system based on FPGA (Field Programmable Gate Array)
  • LVDS (Low Voltage Differential Signaling) interface testing method and system based on FPGA (Field Programmable Gate Array)
  • LVDS (Low Voltage Differential Signaling) interface testing method and system based on FPGA (Field Programmable Gate Array)

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Embodiment Construction

[0026] like figure 1 Shown, a kind of FPGA-based LVDS interface test method comprises the steps:

[0027] Step 1, directly receive the LVDS differential signal through the FPGA and convert the differential signal into a single-ended signal; the step 1 is specifically: directly receive the LVDS differential signal through the FPGA, and convert the LVDS differential signal into An identifiable single-ended signal, the single-ended signal includes a single-ended clock and 4 data lines;

[0028] Step 2, extract line field signal timing from single-ended signal; Described step 2 is specifically: use the phase-locked loop inside FPGA according to the frequency value of single-ended clock, and with the input of single-ended clock as phase-locked loop, by lock The phase loop multiplies the frequency and outputs a 7 times frequency clock to sample each bit of data on each data line, and then arranges the timing of the row and field signals. The timing of the row and field signals incl...

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Abstract

The invention provides a LVDS (Low Voltage Differential Signaling) interface testing method based on a FPGA (Field Programmable Gate Array). The LVDS interface testing method comprises the following steps: S1: through the FPGA, directly receiving a LVDS differential signal, and converting the differential signal into a single-ended signal; S2: extracting a row field signal time series from the single-ended signal; and S3: filling the row field parameter of the FPGA in advance to verify the integrity of the row field signal time series, comparing the correctness of effective data in the row field signal time series through preset data, judging that the LVDS interface is normal if the row field signal time series is integral and the effective data is correct, and otherwise, judging that the LVDS interface is abnormal. The invention also provides a LVDS interface testing system based on the FPGA, the input of hardware equipment is reduced, meanwhile, test time is saved, and test flexibility and accuracy can be improved.

Description

technical field [0001] The invention relates to the field of liquid crystal screen testing, in particular to various FPGA-based LVDS interface testing methods and systems. Background technique [0002] Most of the current processor IC chips have LVDS interface to display the LCD screen, so it is necessary to test whether the LVDS interface of the processor chip is normal before leaving the factory. [0003] LVDS (Low Voltage Differential Signaling) is a low-voltage differential signal technology interface. It is a digital video signal developed to overcome the shortcomings of high power consumption and large EMI electromagnetic interference when transmitting broadband high-bit rate data in TTL level mode. transfer method. The existing test method is to first convert the LVDS signal into a 28-bit TTL parallel signal (24-bit video data and 4 line field signals) through a dedicated LVDS receiver, and then send the 24-bit video data to the processor itself in 3 times. The came...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/22
CPCG06F11/2273G06F11/221
Inventor 黄世凯周敏心林兆强
Owner FUZHOU ROCKCHIP SEMICON
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