Semiconductor structure forming method
A semiconductor and gate structure technology, applied in the field of semiconductor structure formation, can solve problems such as affecting the performance of semiconductor devices, poor stress layer morphology, etc., and achieve the effects of avoiding defects, improving performance and yield, and avoiding leakage current.
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[0034] As mentioned in the background art, the stress layer formed in the prior art has poor morphology, which easily affects the performance of semiconductor devices.
[0035] Please refer to figure 1 , figure 1 It is a schematic cross-sectional structure diagram of a transistor embodiment, including: a substrate 100; a gate structure 101 located on the surface of the substrate 100; a stress layer 102 located on both sides of the gate structure 101; P-type ions or N-type ions form a source region and a drain region; and a covering layer 103 located on the surface of the stress layer 102 .
[0036] Wherein, the cover layer 103 is used to be converted into an electrical contact layer in a subsequent metal silicide process, and the material of the electrical contact layer is a metal silicide material. Since it is necessary to form an electrical interconnection structure, such as a conductive plug, on the surface of the source region and the drain region, the electrical contact...
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