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Method for improving yield of wafer edge

A technology of yield rate and crystal edge, applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc.

Active Publication Date: 2017-03-08
CSMC TECH FAB2 CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Based on this, it is necessary to provide a method to improve the yield of crystal edge to reduce the problem of abnormal defects caused by substrate damage

Method used

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  • Method for improving yield of wafer edge
  • Method for improving yield of wafer edge
  • Method for improving yield of wafer edge

Examples

Experimental program
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Effect test

Embodiment 1

[0025] S110 , providing a wafer substrate 100 .

[0026] The specific type of substrate to choose can be determined according to product requirements, including substrate material, crystal orientation, doping type, etc., which are not limited here. Silicon substrates are commonly used in this field.

[0027] S120, forming a first photoresist layer by photolithography.

[0028] Please also see Figure 5 , apply glue on the wafer substrate 100 to form the first photoresist layer 210, and perform active area scrubbing (using an organic solvent to remove the photoresist residue at the edge of the wafer) and photolithography. In this embodiment, the wash-off dimension a1 from the edge 120 of the wafer substrate to the axis 110 of the wafer substrate is sufficiently large so that the washed-off area of ​​photoresist extends at least from the edge of the wafer to the subsequent metal deposition The deposition area 300 of the process.

[0029] S130, forming a silicon oxide isolati...

Embodiment 2

[0046] Embodiment 1 is to protect the substrate by forming an oxide layer under the unfilled contact hole 10, and embodiment 2 removes the excess ILD so that no contact hole is formed outside the deposition area 300 to prevent the polishing liquid from passing through the contact hole. 10 The hidden danger of corroding the substrate.

[0047] Therefore, the main difference between Embodiment 2 and Embodiment 1 is that, in step S160, the edge wash size a2 in the direction from the edge 120 of the wafer substrate to the axis 110 of the wafer substrate is reasonably set, so that the area where the photoresist is washed away Extends at least from the edge of the wafer to the deposition area 300 . In this way, in step S170, the excess interlayer dielectric 220 will be etched away, directly avoiding the generation of the contact hole 10 not filled with metal. like Figure 7 shown.

[0048] Same as Embodiment 1, after step S190, a step of forming metal wiring 310 by photolithograp...

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Abstract

The invention relates to a method for improving yield of a wafer edge. The method comprises the following steps of providing a wafer substrate; performing gelatinizing on the wafer substrate to form a first photoresist layer, and carrying out edge-washing on an active region; forming a silicon oxide isolation structure in the position, not covered by the first photoresist layer, on the wafer substrate; forming the active region on the wafer substrate; forming interlayer dielectric on the active region; performing gelatinizing on the interlayer dielectric to form a second photoresist layer, and performing edge-washing on contact holes; etching the interlayer dielectric under the sheltering of the second photoresist layer to form the contact holes; filling the contact holes with metal through a deposition process; and performing planarization processing on the interlayer dielectric filled with the metal, wherein the edge-washing region in the step of edge-washing for the active region at least extends from the edge of the wafer to the edge of a deposition region. By setting the proper edge-washing region, the wafer edge yield can be improved without extra cost.

Description

technical field [0001] The invention relates to the field of integrated circuit (IC) manufacturing, in particular to a method for improving the crystal edge yield in the edge cleaning process. Background technique [0002] During the gluing process of the wafer, the action of centrifugal force will cause the photoresist to accumulate on the edge of the wafer to form residual protrusions, which will lead to pollution of subsequent processes and reduce the yield of the wafer edge. In order to remove the photoresist residue accumulated on the edge of the wafer, Edge Bean Removal (EBR) is usually performed after the gluing process to remove the photoresist residue on the edge of the wafer. [0003] The improvement of crystal edge yield is very important for 8-inch factories and processes below 0.18um. In the traditional edge cleaning process, during the subsequent contact hole metal grinding process, the polishing liquid will corrode the silicon lining through the contact holes ...

Claims

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Application Information

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IPC IPC(8): H01L21/768
CPCH01L21/76831
Inventor 陈亚威顾费东
Owner CSMC TECH FAB2 CO LTD
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