Semiconductor memory and manufacturing method thereof

Abstract

The invention discloses a semiconductor memory and a manufacturing method thereof. The semiconductor memory comprises at last two memory chipsets stacked successively from bottom to top, re-wiring layers of two adjacent memory chipsets are electrically connected with inter-layer conductive poles, and a re-wiring layer of the bottommost memory chipset is electrically connected with external connecting projections; and each memory chipset comprises at least two memory chips stacked successively and a composite insulating layer positioned under the memory chips, the memory chips are packed into an integrated structure, the re-wiring layer is arranged in the composite insulating layer, and intra-layer conductive poles of the memory chips are staggered from each other for a preset angle, and are electrically connected with the re-wiring layer. According to the invention, large capacity and high integrated degree of the semiconductor memory are realized, the stacking efficiency of the memory is improved effectively, and the stacking difficulty is reduced.

Description

technical field [0001] Embodiments of the present invention relate to the technical field of semiconductors, and in particular, to a semiconductor memory and a manufacturing method thereof. Background technique [0002] In order to realize the large capacity, high integration and high performance of the memory, a method of stacking memory chips can be used. At present, there are mainly two ways of chip stacking: one is that memory chips are stacked one by one in a dislocation manner, and then each chip is electrically connected together step by step by metal wire bonding. The purpose of using the dislocation structure is to implement metal wire bonding. The other is to vertically stack the memory chips together, and use a through silicon via (Through Silicon Via, TSV) to realize the electrical signal connection between the stacked memory chips. These two methods have obvious defects: chip dislocation stacking and wire bonding, as the number of stacked chips increases, not ...

AI Technical Summary

Problems solved by technology

[0009] In view of this, the embodiments of the present invention provide a semiconductor memory and its manufacturing method to solve the technical problems of low stacking efficiency of semiconductor memory devices, difficulty in realizing multilayer stacking technology, and difficulty in mass production in the prior art

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