Foreground calibration circuit applicable to pipelined analog-digital converter and calibration method thereof
An analog-to-digital converter and calibration circuit technology, applied in analog/digital conversion calibration/testing, analog/digital conversion, energy saving methods, etc. The gain cannot reach the ideal value, etc., to achieve the effect of easy implementation, avoiding high convergence speed and computational complexity, and low digital overhead
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[0037] The principles and features of the present invention are described below in conjunction with the accompanying drawings, and the examples given are only used to explain the present invention, and are not intended to limit the scope of the present invention.
[0038] like figure 1 As shown, it is a schematic diagram of the circuit structure of a preferred embodiment of the present invention, that is, a foreground calibration circuit applied to a pipelined analog-to-digital converter, including an amplifier 100 with local positive feedback, a rear-stage analog-to-digital converter 101, a delay Alignment summation unit 102, adder 103, cumulative averager 104, register 105, calibration state machine 106, subtractor 107, sub-DAC108, n bit sub-ADC109, constant module 200, fixed analog input signal module 201, first switch S1 , the second switch S2, the third switch S3 and the fourth switch S4, the sub-DAC108, the n-bit sub-ADC109 and the subsequent analog-to-digital converter ...
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