Three-dimensional memory and method of forming the same

Abstract

The invention discloses a three-dimensional memory and a forming method thereof, belonging to the technical field of semiconductors. The method includes: providing a substrate, the substrate including a peripheral area and a core area; forming a stepped structure on the core area; forming a protective layer covering the peripheral area and the stepped structure; removing the protective layer covering the peripheral area; A barrier layer is formed on the protection layer; the barrier layer is etched to form a first contact hole on the step structure containing the protection layer, and a second contact hole is formed on the peripheral area. The method in the present invention can effectively prevent the chemical reaction between the tungsten in the gate line layer and the reaction gas to form a compound residue at the bottom of the contact hole during the process of forming the contact hole on the step structure, thereby effectively ensuring the step structure. The electrical properties of the contact holes formed on the structure further improve the yield rate of the finished product of the three-dimensional memory.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a three-dimensional memory and a forming method thereof. Background technique [0002] With the improvement of people's demand for storage capacity, three-dimensional memory came into being. Existing three-dimensional memory formation methods, such as Figure 1 to Figure 6 The schematic diagram of structural changes shown mainly includes: 1) Provide a substrate containing a peripheral region (including gate structure, left P well, N well) and a core region (including right P well), and form steps on the core region structure, and deposit tetraethoxysilane (TEOS) to form a barrier layer; 2) etch the barrier layer to form a first contact hole groove on the stepped structure; 3) deposit 4) etching the barrier layer to form a second contact hole groove on the peripheral region; 5) removing the silicon nitride layer at the bottom of the first contact hole groove; 6) forming a ...

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Problems solved by technology

Among them, in the process of depositing silicon nitride in step 3), the tungsten in the gate line layer (GL Tier) will usually chemically react with the ammonia gas (NH3) in the reaction gas for depositing silicon nitride, and in the first contact The bottom of the hole groove generates compound WxNy residues, such as Figure 7 to Figure 9 As shown in the photo taken with special equipment, it can be clearly seen that a WxNy residue with a thickness of about 8.05 nanometers is formed at the bottom of the groove; and in step 5), the silicon nitride layer at the bottom of the groove of the first contact hole is removed During the process, it is difficult to remove the compound WxNy residue, which will seriously affect the electrical properties of the first contact hole formed subsequently, and greatly reduce the yield of the final three-dimensional memory product.

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