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Ge PMOS device based on LRC process and preparation method thereof

A process and device technology, applied in the field of GePMOS devices based on LRC process and their preparation, can solve the problems of limiting the performance of PMOS devices, large difference in lattice constants, high surface roughness, etc., to reduce dislocation density and surface roughness, High selectivity and good frequency characteristics

Inactive Publication Date: 2018-03-09
NORTHWEST UNIV(CN)
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the lattice constants of Ge materials and Si materials are quite different, and the lattice mismatch is as high as 4.2%. The epitaxial thin film layer of Si-based Ge is easy to form higher surface roughness and higher dislocation density, which greatly limits The performance of the PMOS device

Method used

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  • Ge PMOS device based on LRC process and preparation method thereof
  • Ge PMOS device based on LRC process and preparation method thereof
  • Ge PMOS device based on LRC process and preparation method thereof

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Embodiment 1

[0068] See figure 1 , figure 1 A schematic diagram of a process flow of a Ge PMOS device based on an LRC process provided by an embodiment of the present invention. The method comprises the steps of:

[0069] Step a, selecting a single crystal Si substrate;

[0070] Step b. growing a first Ge seed layer on the Si substrate at a first temperature;

[0071] Step c. growing a second Ge host layer on the surface of the first Ge seed layer at a second temperature;

[0072] Step d, depositing SiO on the surface of the second Ge host layer 2 Material;

[0073] Step e, heating the entire substrate material to 700°C, and continuously adopting a laser process to crystallize the entire substrate material, wherein the laser wavelength is 808nm, the laser spot size is 10mm×1mm, and the laser power is 1.5kW / cm 2 , the laser moving speed is 25mm / s to form a crystallized Ge layer;

[0074] Step f, etching the SiO 2 Material, obtain Ge / Si virtual substrate material;

[0075] Step g, g...

Embodiment 2

[0110] See Figure 6a-Figure 6n , Figure 6a-Figure 6n A schematic diagram of a laser recrystallization Ge PMOS device process provided by an embodiment of the present invention. The method includes:

[0111] S101, such as Figure 6a , select single crystal Si substrate 001;

[0112] S102, such as Figure 6b , at a temperature of 275° C. to 325° C., using a CVD process to grow a first Ge seed layer 002 of 40 to 50 nm on the single crystal Si substrate;

[0113] S103, such as Figure 6b , at a temperature of 500° C. to 600° C., a second Ge main body layer 002 of 150 to 250 nm is grown on the surface of the first Ge seed crystal layer by using a CVD process (in the figure, for ease of viewing, the first Ge seed crystal layer and the The second main body layer is uniformly numbered 002);

[0114] S104, such as Figure 6c , depositing 150nm SiO on the surface of the second Ge host layer by CVD process 2 layer 003;

[0115] S105, including the single crystal Si substrate,...

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Abstract

The invention relates to a Ge PMOS device based on the LRC process and a preparation method thereof. The method comprises steps that a Si substrate is selected; a Ge seed crystal layer grows; a Ge main body layer grows; a SiO2 material is deposited; the substrate material is heated to 700 DEG C, the laser process is continuously utilized for crystallization of the whole substrate material, laser wavelength is 808nm, the light spot dimension is 10mm*1mm, the power is 1.5kW / cm2, the moving speed is 25mm / s, and a crystallization Ge layer is formed; the SiO2 material is etched; a gate medium layergrows; a grid layer grows; a source drain region is formed, and the PMOS device is finally formed. The method is advantaged in that the PMOS device is realized through the laser re-crystallization process (LRC), dislocation density of a Ge / Si virtual substrate can be effectively reduced, the continuous laser re-crystallization process has high selectivity and only acts on a Ge epitaxial layer, control is precise, a Si-Ge mutual expansion problem is avoided, the continuous laser re-crystallization process is utilized for auxiliary preparation of the Ge / Si virtual substrate, the crystallizationspeed is fast, the process steps are simple, the process period is short, and heat budget is low.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a Ge PMOS device based on an LRC process and a preparation method thereof. Background technique [0002] Since Jack Kilby invented the first integrated circuit in 1958, integrated circuits have been developing according to Moore's law, that is, the number of transistors that can be accommodated on an integrated circuit will double every eighteen months, and the performance will double , while the price is cut in half. Moore's Law still holds true today. [0003] However, with the further development of microelectronics technology, the feature size of the device is continuously reduced, the speed of the circuit is continuously increased, and physical limitations such as static leakage, short channel effect, increase in power consumption density, and mobility degradation make the performance of the device continue to deteriorate. IC chips are gradually approaching the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L21/336H01L29/10H01L21/268
CPCH01L21/268H01L29/1033H01L29/66477H01L29/78
Inventor 汪霖张万绪彭瑶刘成陈晓璇姜博
Owner NORTHWEST UNIV(CN)