Core processing circuit design method for navigation system

Abstract

The invention belongs to the technical field of airborne and missile-borne navigation data processing and relates to a core processing circuit design method for a navigation system. The invention discloses a core processing circuit design method for an inertial navigation system based on a multi-core processor. The design method comprises the following steps: 1, designing a core processing circuitof a multi-core processor inertial navigation system based on a domestic multi-core processor FT-Q6713J/500; 2, designing a high-precision temperature sensor acquisition circuit; 3, designing a high-speed data acquisition circuit with high real-time property and high robustness; 4, designing a high-speed 1553B bus circuit; 5, performing health management design on the inertial navigation system.According to the design, the multifunctional highly-integrated core processing circuit for the inertial navigation system is realized.

Description

technical field [0001] The invention belongs to the technical field of airborne and missile-borne inertial navigation data processing, and relates to a design method for a navigation system core processing circuit. Background technique [0002] Inertial navigation technology has the advantages of strong autonomy, high short-term accuracy, and strong real-time performance, but the accumulation of errors in its inertial components affects the long-term stability of inertial navigation, making it difficult to complete long-duration navigation tasks with high precision. With the rapid development of inertial technology, more and more types of navigation sensors have been introduced into the inertial navigation system, and the data processing and calculation capabilities of the navigation system's data processing platform, sensor fusion capabilities, and health monitoring and management capabilities have also been raised. Therefore, the development of a computing platform with mu...

AI Technical Summary

Problems solved by technology

[0003] The patent "A navigation solution device based on heterogeneous multi-core architecture" (application number: CN201610935841.0, publication number: CN106547237A) applied by Huazhong Optoelectronics Technology Research Institute discloses a heterogeneous multi-core architecture based on ARM+DSP Due to the use of heterogeneous multi-core architecture, the solving device still has the disadvantages of high power consumption of the system and low data transmission efficiency between heterogeneous multi-cores

[0004] The patent "a multi-core DSP-based inertial / satellite deep combined information processing hardware platform" (application number CN201410336170.7, publication number CN105319569A) applied by Beijing Automation Control Equipment Research Institute adopts multi-core DSP design hardware platform, and uses 4 cores to complete different Calculation and deep combination functions, but the hardware implements a single function and fails to integrate bus transmission, sensor acquisition and data transmission, and health monitoring functions of the navigation system

Images