Power device packaging method as well as packaging module and lead frame thereof
A technology for power devices and packaging methods, which is applied in the manufacturing of electric solid-state devices, semiconductor devices, and semiconductor/solid-state devices, etc., can solve the problems of increasing the process flow of glue removal, increasing the heat loss of products, and high porosity of the bonding layer. The effect of reducing voids, facilitating electrical connection and uniform thickness
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[0036] In order to further illustrate the principle and structure of the present invention, preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings.
[0037] The invention provides a packaging method for a power device, combining figure 1 as shown, figure 1 It is a flow chart of the packaging method of the power device of the present invention, including the following steps:
[0038] Step S1: Sintering process, providing power chip and substrate, silver-plating on the back of the power chip, silver-plating on the top surface of the substrate, bonding the preformed silver film to the silver-plated back of the power chip, and sintering the power chip Sintered in the silver-plated area on the top surface of the substrate, the power chip is sintered with the substrate.
[0039] combine figure 2 as shown, figure 2A schematic diagram of the structure of the substrate. The substrate 10 may be made of silicon ni...
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