A kind of deep and shallow trench semiconductor power device and preparation method thereof

Abstract

A deep and shallow trench semiconductor power device, including a P-shaped base region, an N+ source region, a terminal region, a source metal pad layer, and a gate metal pad layer, with at least two trenches of different depths, passing through the P-type The base region enters the epitaxial layer; among them, a trench with a depth, its side wall and bottom wall are dielectric layers, and the middle is a conductive material, and the formed conductor is connected to the gate metal and used as the gate of the device; the other A trench with a depth of two parts: an upper part of the trench and a lower part of the trench: the side wall and bottom wall of the lower part of the trench are dielectric layers, and the middle is a conductive material, and the formed conductor is connected to The metal in the source region is used as a field plate; the sidewall and bottom wall of the upper part of the trench are dielectric layers, and the middle is a conductive material. The conductor is connected to the gate metal and used as the gate of the device. In the semiconductor power device of the present invention, deep and shallow field plates are combined to optimize the function of the field plate, save chip area, and increase the performance-price ratio of the device.

Description

technical field [0001] The invention relates to the technical field of semiconductor power devices, in particular to a deep and shallow trench semiconductor power device and a preparation method thereof. Background technique [0002] The power gate field effect transistor (POWER MOSFET) is a unipolar carrier type device, which is easy to control. Compared with bipolar transistors, the control switch requires only very low power, and due to the low on-resistance and high-speed switching , so it can effectively control high frequency and large current. At present, power MOSFETs have been widely used in various electronic and communication products, such as power amplifiers, power converters, low-noise amplifiers, and power supply switches and power circuits of some personal computers. There are also various applications in industry. [0003] As a switching device is used, the losses associated with the device during application can be divided into conduction loss and switchi...

AI Technical Summary

Problems solved by technology

Although this device structure is better than the general standard UMOS, it is not optimized, and the disadvantage is that there is only one (parametric) field plate, which is simple in design and process, but the efficacy of the field plate cannot be fully realized. To play, too much chip space is used as a field plate, reducing the space available for the epitaxial layer to conduct

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