Wide-dynamic range low-mismatch charge pump circuit applied to phase-locked loop

Abstract

The invention discloses a wide-dynamic range low-mismatch charge pump circuit applied to a phase-locked loop. The wide-dynamic range low-mismatch charge pump circuit comprises a bias module, a currentmirror module and a charging and discharging matching module; the bias module is used for generating a constant current and outputting the constant current to the current mirror module; the current mirror module is used for supplying a bias voltage to a charging control unit, a charging unit, a discharging unit and a discharging control unit in the charging and discharging matching module; the charging control unit and the discharging control unit are used for detecting the output voltage of a charge pump and adjusting the charging current and the discharging current to enable the charging current and the discharging current to be matched; and the charging unit and the discharging unit are used for outputting loads to the charge pump for charging or discharging. According to the charge pump circuit, the output voltage is fed back to the charging control unit and the discharging control unit, so that the charging current and the discharging current of the charge pump are matched in a wide output voltage range; and the charge pump circuit does not need an additional operation amplifier circuit and is simple in structure, good in stability, low in power consumption, easy to integrateand suitable for a high-performance phase-locked loop circuit.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a wide dynamic range and low mismatch charge pump circuit applied to a phase-locked loop. Background technique [0002] Phase-locked loops (Phase-locked loops, PLL) is a frequency and phase synchronization technology realized by the principle of feedback control, and its function is to synchronize the clock output by the circuit with its external reference clock. When the frequency or phase of the reference clock changes, the phase-locked loop will detect this change and adjust the output frequency through its internal feedback system until the two are re-synchronized. This synchronization is also called "phase-locked". PLLs are used in many fields, such as wireless communication, digital TV, broadcasting, etc. Specific applications include but are not limited to: wireless communication system transceiver module (Transceiver), data and clock recovery circuit (Clock a...

AI Technical Summary

Problems solved by technology

[0004] In order to achieve a higher matching accuracy of charging current and discharging current, the traditional charge pump circuit usually uses an operational amplifier circuit to clamp the voltage of the current mirror and the output terminal, which not only increases the complexity of the circuit, but also increases the overall power consumption of the circuit. , area and stability issues

In order to meet the wide output frequency range of the phase-locked loop, it is usually realized by improving the tuning sensitivity of the voltage-controlled oscillator and widening the voltage dynamic range of the charge pump circuit, but increasing the tuning sensitivity of the voltage-controlled oscillator will introduce a large Noise, in order to ensure the noise characteristics of the phase-locked loop, the dynamic range of the charge pump tuning voltage can be improved, which requires the operational amplifier to achieve rail-to-rail input and output characteristics, further increasing the design difficulty of the charge pump circuit

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