Method for manufacturing small-size magnetic random access memory structure unit

Abstract

The invention discloses a method for manufacturing a small-size magnetic random access memory structure unit. The method comprises: a first step, providing a surface-polished semiconductor substrate with a metal via, wherein the metal via is formed in a metal interlayer dielectric layer and the top surface of the metal via may be uneven; a second step, depositing a via barrier layer on the semiconductor substrate with the metal via and performing planarization on the via barrier layer; and a third step, growing a magnetic tunnel junction and a hard mask layer on the via barrier layer after planarization, and then continuously manufacturing a magnetic tunnel junction unit in a patterned manner.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, in particular to the field of magnetic random access memory (MRAM, Magnetic Radom Access Memory) manufacturing technology; more specifically, the present invention relates to a method for manufacturing small-sized magnetic random access memory structural units. Background technique [0002] In recent years, MRAM using magnetic tunnel junction (MTJ) has been considered as the future solid-state non-volatile memory, which has the characteristics of high-speed reading and writing, large capacity and low energy consumption. The ferromagnetic magnetic tunnel junction is usually a sandwich structure with a magnetic memory layer that can change the magnetization direction to record different data; an insulating tunnel barrier layer in the middle; a magnetic reference layer on the other side of the tunnel barrier layer , its magnetization direction remains unchanged. [0003] In order to ...

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Problems solved by technology

At the same time, the write operation in the non-volatile memory is based on the change of the resistance state, so it is necessary to control the damage and shortening of the life of the magnetic tunnel junction memory device caused by it.

However, the preparation of a small magnetic tunnel junction element may increase the fluctuation of the magnetic tunnel junction resistance, so that the write voltage or current of pSTT-MRAM will also fluctuate greatly, which will damage the performance of MRAM.

[0005] In the current MRAM manufacturing process, in order to meet the requirements of MRAM circuit miniaturization, the magnetic tunnel junction unit is usually directly fabricated on the substrate with surface-polished CMOS through holes, and at the same time, the CMOS through hole and the magnetic tunnel junction unit are aligned. That is: the so-called on-axis structure; however, due to the presence of conductive materials such as copper or tungsten, the top surface of the CMOS via hole is relatively rough, which in turn leads to a relatively rough MgO (2031) barrier layer, and performance Poor magnetic tunneling, such as Figure 1A shown

In order to avoid topographical defects due to VIA, a structure in which the magnetic tunnel junction unit is not directly above the CMOS via is usually adopted, such as Figure 1B As shown, that is: the so-called off-axis (off-axis) structure, but the price is that the size of the MRAM unit increases, which hinders the increase in memory density

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