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Semiconductor device

A technology of semiconductors and substrates, applied in semiconductor devices, electrical components, circuits, etc., can solve problems such as slow switching speed, reduce surge voltage, and operation errors, and achieve the effect of easing potential changes

Inactive Publication Date: 2018-12-21
SHINDENGEN ELECTRIC MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, once a high-resistance shield electrode is used as the shield electrode as described above, in the second half of the switching cycle, since a potential difference occurs along the wiring of the shield electrode, the gate-source capacitance C GS Gate voltage V GS It will rise suddenly, so there is a problem of easy operation error (self-turn-on (Self Turn-On)) (refer to Figure 4 Symbol A in (b)
Also, due to the slow switching speed (refer to Figure 4 (b)), there is also the problem of increased switching loss
[0008] On the other hand, if a low-resistance shield electrode is used as the shield electrode (see Figure 5 as well as Image 6 (a)), since the potential change of the drain electrode cannot be moderated when the switch is turned off, the effect of suppressing the ringing and reducing the surge voltage cannot be obtained (see Image 6 (b))

Method used

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Embodiment approach 1

[0051] 1. Semiconductor device

[0052] The semiconductor device 100 involved in the first embodiment is such as figure 1 , figure 2 (a) and figure 2 As shown in (b), it includes: a semiconductor substrate 110 containing: an n+ type drain region (first conductivity type drain region) 112, and an n-type drift region (first conductivity type) adjacent to the n+ type drain region 112 Type drift region) 114, a p-type base region (second conductivity type base region) 116 adjacent to the n-type drift region 114, and an n+ type source region adjacent to the p-type base region 116 (First conductivity type source region) 118; trench 122, formed in the semiconductor base 110, having a groove bottom adjacent to the n-type drift region 114, and the p-type base region 116 and the n-type drift The sidewalls of the region 114 adjacent to each other are formed in a stripe shape when viewed in plan; the gate electrode 126 is arranged in the trench 122, and the sidewall is connected to the p-t...

Embodiment approach 2

[0100] The semiconductor device according to the second embodiment basically has the same configuration as the semiconductor device 100 according to the first embodiment, but is different from the semiconductor device 100 according to the first embodiment in the configuration of the shield electrode 130. That is, as Picture 12 As shown, in the shield electrode 130 included in the semiconductor device according to the second embodiment, the high resistance region 130a and the low resistance region 130b are made of different materials, and the resistivity of the material constituting the low resistance region 130b is lower than The resistivity of the material constituting the high resistance region 130a.

[0101] As a material constituting the high-resistance region 130a, for example, high-resistance polysilicon formed by a CVD method can be used. In addition, as a material constituting the low resistance region 130b, for example, a metal with a high melting point (for example, W,...

Embodiment approach 3

[0105] The semiconductor device 102 according to the third embodiment basically has the same configuration as the semiconductor device 100 according to the first embodiment, but is different from the semiconductor device 100 according to the first embodiment in the configuration of the shield electrode 130. That is, as Figure 13 as well as Figure 14 As shown, in the shield electrode 130 included in the semiconductor device 102 according to the third embodiment, the high-resistance region 130a and the low-resistance region 130b are made of the same material, and are cut in a plane perpendicular to the longitudinal direction of the trench 122 The cross-sectional area of ​​the subsequent high-resistance region 130a is smaller than the cross-sectional area of ​​the low-resistance region 130b cut in a plane perpendicular to the longitudinal direction of the trench 122.

[0106] In this way, although the semiconductor device 102 according to the third embodiment is different from the ...

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PUM

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Abstract

A semiconductor device 100 is provided with: a gate electrode 126 disposed in a trench 122 with a portion at a side wall opposite to a p type base region 116 via a gate insulating film 124; a shield electrode 130 disposed in the trench 122 and positioned between the gate electrode 126 and the bottom of the trench 122; an electric insulation region 128 in the trench 122, which extends between the gate electrode 126 and the shield electrode 130, and furthermore, along the side wall and the bottom of the trench 122, and isolates the shield electrode 130 from the side wall and the bottom; and a source electrode 134, which is electrically connected to an n+ type source region 118, and is also electrically connected, at both end portions of the trench 122, to the shield electrode 130 in plan view. The shield electrode 130 has, in plan view, high-resistance regions 130a positioned at both the end portions of the trench 122, and a low-resistance region 130b positioned at a position sandwichedbetween the high-resistance regions 130a. In the semiconductor device, ringing and a surge voltage can be suppressed, a malfunction can be suppressed, an increase of a switching loss can be eliminated, and adverse effects due to a surge voltage from the outside can be reduced.

Description

Technical field [0001] The present invention relates to semiconductor devices. Background technique [0002] In the past, a semiconductor device having a so-called Shield Gate structure has been generally recognized (for example, refer to Patent Document 1). The conventional semiconductor device 900 such as Figure 23 As shown in (a), it includes: a semiconductor substrate 910, including: an n + type drain region 912, an n- type drift region 914, a p type base region 916, and an n + type source region 918; a trench (Trench) 922, It has a groove bottom formed in the semiconductor base 910 and adjacent to the n-type drift region 914, and sidewalls adjacent to the p-type base region 916 and the n-type drift region 914, and are viewed from the plane The gate electrode 926 is arranged in the trench 922 and faces the p-type base region 916 via the insulating film 924 at the sidewall part; the shield electrode 930 is arranged in the trench In the trench 922, and between the gate electr...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78
CPCH01L29/78H01L29/7813H01L29/407H01L29/66734H01L29/405H01L29/41
Inventor 岸雅人竹森俊之秋元俊孝竹本刚太郎伊藤瑛基
Owner SHINDENGEN ELECTRIC MFG CO LTD
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