Sealing materials for semiconductors

A sealing material and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid device components, electric solid devices, etc., to achieve the effect of correcting warpage

Active Publication Date: 2021-12-14
TAIYO HLDG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, it is not necessarily easy to directly mount a semiconductor chip with bumps formed at a fine pitch on a circuit board.

Method used

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  • Sealing materials for semiconductors
  • Sealing materials for semiconductors
  • Sealing materials for semiconductors

Examples

Experimental program
Comparison scheme
Effect test

Embodiment

[0166] Hereinafter, the present invention will be described by way of examples, but the present invention is not limited by these examples. In addition, unless otherwise stated, "part" and "%" mean a mass part. In addition, unless otherwise specified, the preparation of the sealing material for semiconductors and the subsequent measurement were performed in an environment not exposed to active energy rays.

[0167]

[0168] 119.4 parts of novolak type cresol resin (manufactured by Showa Denko Co., Ltd., Shonol CRG951, OH equivalent: 119.4) and potassium hydroxide 1.19 were put into an autoclave equipped with a thermometer, a nitrogen introduction device and an alkylene oxide introduction device, and a stirring device. part and 119.4 parts of toluene, nitrogen replacement was carried out in the system under stirring, and the temperature was raised by heating. Next, slowly add 63.8 parts of propylene oxide dropwise at 125°C to 132°C at a rate of 0 to 4.8kg / cm 2 React for 16 ...

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Abstract

Provided is a sealing material for semiconductors capable of reducing warpage of semiconductor wafers and semiconductor packages, especially wafers or packages in fan-out wafer-level packaging (FO-WLP). A semiconductor sealing material comprising at least a thermosetting component (A) and an active energy ray-curable component (B), characterized in that it is resistant to 150°C in an environment not exposed to active energy rays. Sealing material for semiconductors after heat treatment for 10 minutes, at 25°C, at 1J / cm 2 When irradiated with ultraviolet light including a wavelength of 351 nm, the calorific value α (J / g) at this time satisfies 1≦α (J / g).

Description

technical field [0001] The present invention relates to a sealing material for a semiconductor, and more specifically, to a sealing material for a semiconductor of a fan-out type wafer level package in which an arrangement area of ​​an electrode for external connection is larger than the planar size of a semiconductor. Background technique [0002] In recent years, the demand for miniaturization in the field of semiconductor circuits and the like has gradually increased. To meet this demand, semiconductor circuits may be mounted in packages (Chip Size Packages) close to their chip size. As one of means for realizing chip-scale packaging, a packaging method called wafer-level packaging (Wafer Level Package, hereinafter sometimes abbreviated as WLP) in which wafer-level bonding and fragmentation are performed has been proposed. WLP has attracted attention because it can contribute to cost reduction and miniaturization. The WLP is flip-chip mounted on a circuit substrate on wh...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): C08G59/40C08F2/44C08F2/46H01L23/12H01L23/29H01L23/31
CPCC08F2/44C08F2/46C08G59/40H01L23/12H01L23/29H01L23/31H01L23/293
Inventor 二田完佐藤和也
Owner TAIYO HLDG CO LTD
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