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Static random storage unit and manufacturing method thereof
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A technology of static random storage and manufacturing method, applied in static memory, information storage, digital memory information and other directions, can solve the problems of large occupied area of SRAM cell, weak anti-noise ability, poor stability, etc., to improve anti-noise ability, logic Craft compatible, logical craft complete effect
Active Publication Date: 2019-03-12
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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[0012]
In view of the above-mentioned shortcoming of the prior art, the object of the present invention is to provide a static random access memory unit and a manufacturing method thereof, which are used to extend the feedback time of the SRAM unit for external disturbances when the key storage nodes of the SRAM unit are in the state, and improve the storage capacity. Unit stability, while solving the problems of large occupied area of SRAM units, poor stability, high leakage power consumption and weak anti-noise ability in the prior art
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Embodiment 1
[0098] The present invention provides a static random access memory unit, and adopts eight transistors, please refer to figure 1 , shown as a schematic diagram of the circuit principle of the SRAM unit, including:
[0099] The first PMOS pull-up transistor 101, the second PMOS pull-up transistor 201, the first NMOS pull-down transistor 102, the second NMOS pull-down transistor 202, the first NMOS access transistor 301, the second NMOS access transistor 302, the third NMOS memory Access pipe 303 and fourth NMOS access pipe 304 .
[0100] Specifically, the gate of the first PMOS pull-up transistor 101 is connected to the drain of the second PMOS pull-up transistor 201, and the drain of the first PMOS pull-up transistor 101 is connected to the second PMOS pull-up transistor 201. The gate of the transistor 201 is connected, and the source of the first PMOS pull-up transistor 101 and the source of the second PMOS pull-up transistor 201 are both connected to a high level VDD;
[0...
Embodiment 2
[0121] The present invention also provides a manufacturing method of a static random storage unit, comprising the following steps:
[0122] First, step 1) is performed to provide an SOI substrate including a back substrate, an insulating buried layer, and a top layer of silicon in sequence from bottom to top, and a shallow trench isolation structure is formed in the top layer of silicon to define an active region.
[0123] Specifically, such as Figure 7 As shown, four active regions 20a, 20b, 20c and 20d are defined, wherein these four active regions 20a, 20b, 20c and 20d are arranged in sequence, and shallow trenches are formed around each active region, and within the shallow trenches It is filled with insulating material to form a shallow trench isolation structure. In this embodiment, the insulating material is silicon dioxide.
[0124] Then perform step 2), such as Figure 8 As shown, an N well 30, a first P well 40a, and a second P well 40b are fabricated in the top ...
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Abstract
The invention provides a static random storage unit and a manufacturing method thereof. Tunneling diode structures are embedded in the sources of a pull-up transistor and a pull-down transistor, the leakage power consumption and transistorthreshold voltage drift caused by a floating body effect in a PDSOI device and a parasitic triode effect can be effectively suppressed without increasing the device area (the final effect unit area can be less than 7.5[mu]m<2>), and the anti-noise ability of the unit is improved. Moreover, the manufacturing method of an SOI six-transistor SRAM cell providedby the invention has the advantages of simple manufacturing process and complete compatibility with the existing logic process and the like, a central symmetrical structure in each unit and a shared structure between the units are adopted, so that a storage array can be conveniently formed by the units, and it is conducive to shortening the period of designing SRAM chips.
Description
technical field [0001] The invention relates to the field of memory design and manufacture, in particular to a static random memory unit and a manufacturing method thereof. Background technique [0002] With the development of semiconductor technology, the size of transistors has entered deep submicron, and the scale of memory modules has been continuously expanded in response to performance requirements. The working environment of aerospaceelectronic equipment is harsh, and the memory unit is exposed to the radiation of various high-energy particles, while the storage unit is more sensitive to high-energy particleradiation. Traditional memory cells are generally difficult to meet radiation resistance requirements, so designers often make improvements on the basis of traditional memory cells to improve the radiation resistance of the cells. [0003] Single event effects and total dose effects are the most common and important two types of radiation effects. [0004] The ...
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