Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

An FPGA and a system thereof, which support multi-bit stream downloading

A streaming download and bit stream technology, applied in the field of FPGA and its system, can solve the problems of large-scale use cost, configuration data leakage, single function, etc., and achieve the effect of increasing use efficiency, increasing robustness, and convenient updating.

Pending Publication Date: 2019-03-29
XIAN INTELLIGENCE SILICON TECH INC
View PDF6 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, the AS mode configuration is only suitable for occasions where the FPGA works stably, has a single function, and is infrequently updated; the EPCS device used in the PS mode configuration is expensive, and the cost of large-scale use is too high. It will also add an additional MCU or CPLD chip wiring area on the system PCB, and the existing FPGA often does not encrypt or simply encrypt the configuration data during configuration, which may also lead to configuration data leakage

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • An FPGA and a system thereof, which support multi-bit stream downloading
  • An FPGA and a system thereof, which support multi-bit stream downloading
  • An FPGA and a system thereof, which support multi-bit stream downloading

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0038] The existing FPGA configuration methods are generally divided into active configuration AS mode and passive configuration PS mode. Take ALTERA FPGA (Altera Corporation Altera) as an example: Among them,

[0039] The AS mode is: FPGA acts as a controller every time it is powered on, and the FPGA device guides the configuration operation process, controls the external memory and the initialization process, and actively sends a read data signal to the configuration device, thereby converting the bits of the EPCS (serial memory) The stream data is read into the FPGA, and the bit stream data is sent to the FPGA through the FPGA_DATA0 pin, and is synchronized on the FPGA_DCLK, and one clock transmits one bit of data.

[0040] PS mode: the configuration process is controlled by an external computer or controller, and it is completed through configuration devices such as enhanced configuration devices (EPC16, EPC8). EPCS is used as a control device, FPGA is used as a memory, an...

Embodiment 2

[0048] See figure 2 with image 3 , figure 2 A schematic structural diagram of another FPGA supporting multi-bit stream download provided by the present invention, image 3 A structural schematic diagram of another FPGA supporting multi-bit stream download provided by the present invention. In this embodiment, on the basis of the foregoing embodiments, a single-chip microcomputer chip is used as a control module and a memory card is used as an external storage device as an example, and the internal structure of the control module is further described in detail as follows.

[0049] The single-chip microcomputer chip may include a mode selection unit and a processing unit; wherein the mode selection unit is connected to the processing unit for selecting bit stream data. The processing unit is connected to the FPGA chip for downloading the bit stream data to the FPGA chip. Since there are multiple bit stream data with different functions stored in the external storage devic...

Embodiment 3

[0053] See Figure 4 with Figure 5 , Figure 4 A schematic structural diagram of another FPGA supporting multi-bit stream download provided by the present invention, Figure 5 A schematic structural diagram of yet another FPGA supporting multi-bit stream download provided by the present invention. This embodiment focuses on describing the decryption process of the FPGA of the present invention on the basis of the foregoing embodiments.

[0054] For some high-demand scenarios, bitstream data needs to be encrypted to protect data security. When the encrypted multi-bit stream data needs to be encrypted, corresponding data decryption needs to be performed.

[0055] The control module of this embodiment may include a decryption unit and a key unit. Wherein, the secret key unit is used to provide a secret key to the decryption unit; the decryption unit is used to decrypt the bit stream data to be transmitted with the secret key. Specifically, when configuring the FPGA through...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to an FPGA supporting multi-bit stream downloading and a system thereof , which support multi-bit stream downloading. The FPGA comprises a control module, an FPGA chip and a package body. Wherein the control module and the FPGA chip are packaged in the package body; The control module is electrically connected with the FPGA chip, and is used for realizing multi-bit stream downloading of the FPGA. The invention provides an FPGA supporting multi-bit stream downloading, The control module and the FPGA chip are encapsulated in the encapsulation body. When the FPGA is needed to realize a certain function, the control module can flexibly download the corresponding bit stream data to configure the FPGA chip, which increases the use efficiency of the FPGA chip and saves the wiring space and cost.

Description

technical field [0001] The invention belongs to the field of integrated circuit design, and in particular relates to an FPGA supporting multi-bit stream downloading and a system thereof. Background technique [0002] FPGA (Field-Programmable Gate Array), that is, Field Programmable Gate Array, is a product of further development on the basis of programmable devices such as PAL, GAL, and CPLD. It emerged as a semi-custom circuit in the field of application-specific integrated circuits (ASIC), which not only solves the shortcomings of custom circuits, but also overcomes the shortcomings of the limited number of original programmable device gates. [0003] For the FPGA device, it must be successfully configured before it can work normally. The configuration mentioned here is the programming of the program, and the FPGA can work normally only after the program is programmed into the FPGA. For FPGA devices, there are three types of configuration download methods including: activ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/78G06F21/60G06F8/61
CPCG06F8/63G06F15/7807G06F21/602
Inventor 孙浩涛褚惠芬贾红程显志韦嶔陈维新
Owner XIAN INTELLIGENCE SILICON TECH INC
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com