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Sic epitaxial wafer

A technology for epitaxial wafers and single crystal substrates, applied in semiconductor devices, electrical components, circuits, etc., can solve problems such as device reliability reduction, and achieve the effect of suppressing basal plane dislocations

Inactive Publication Date: 2019-05-21
RESONAC HOLDINGS CORPORATION
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When a high-resistance portion is generated within the device, the reliability of the device decreases

Method used

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  • Sic epitaxial wafer
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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0093] A SiC single crystal substrate with a diameter of 100 mm was prepared. The prepared SiC single crystal substrate was a 4H-type polytype, and the main surface had a Si surface having an off angle of 4° from (0001) to the direction.

[0094] Next, a SiC single crystal substrate was introduced into the reaction furnace, and a source gas (trioxosilane, propane, hydrogen chloride) was introduced at a growth temperature of 1600° C. to perform epitaxial growth. As a dopant gas, nitrogen was used. At this time, the C / Si during growth is changed over time in the range of 0.8 to 1.0 to change the dopant introduction efficiency.

[0095] Furthermore, the carrier concentration in the thickness direction of the obtained epitaxial layer was measured using secondary ion mass spectrometry (SIMS). The carrier concentration in the thickness direction was obtained by measuring with SIMS while cutting the epitaxial layer in the depth direction. exist Figure 3A The results are shown i...

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Abstract

An SiC epitaxial wafer according to the present invention includes: an SiC single crystal substrate; and a carrier concentration variation layer disposed on one face side of the SiC single crystal substrate, wherein the carrier concentration variation layer includes: high concentration layers in which carrier concentrations thereof are higher than carrier concentrations of adjacent layers; and lowconcentration layers in which carrier concentrations are lower than in adjacent layers, and the high concentration layers and the low concentration layers are laminated alternately.

Description

technical field [0001] The present invention relates to SiC epitaxial wafers. Background technique [0002] Compared with silicon (Si), silicon carbide (SiC) has a one-digit larger insulation breakdown electric field, three times larger band gap, and about three times higher thermal conductivity. Therefore, applications of silicon carbide (SiC) to power devices, high-frequency devices, high-temperature operating devices, and the like are expected. [0003] In order to promote the practical use of SiC devices, it is required to establish high-quality SiC epitaxial wafers and high-quality epitaxial growth technologies. [0004] The SiC device is formed on a SiC epitaxial wafer including a SiC substrate and an epitaxial layer stacked on the substrate. The SiC substrate is obtained by processing a bulk single crystal of SiC grown using a sublimation recrystallization method or the like. The epitaxial layer is formed by chemical vapor deposition (Chemical Vapor Deposition: CVD...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/02
CPCH01L21/02378H01L21/02447H01L21/02529H01L21/0262H01L21/02579H01L21/02433H01L21/02576H01L29/1608H01L29/06H01L29/045H01L21/02634
Inventor 石桥直人深田启介
Owner RESONAC HOLDINGS CORPORATION