A reconfigurable computing storage fusion flash memory control system

Abstract

The invention discloses a reconfigurable computing storage fusion flash memory control system which comprises a host interface, a flash memory medium interface, an embedded processor, a cache and storage controller, an on-chip FLASH, an NVSRAM and an embedded FPGA, and all hardware modules are mounted on an internal bus and communicate through the internal bus. And the embedded FPGA is used for calculating hardware acceleration of tasks, generating a bit stream file in a software environment and reburning the bit stream file, changing the internal structure of the embedded FPGA, arranging andwiring the embedded FPGA, realizing different functions and realizing a reconfigurable hardware acceleration function. The method solves the problems of bandwidth wall and high power consumption caused by separation of calculation and storage and the technical problem of chip tape-out function solidification, has the advantages of being programmable, flexible in design, capable of achieving onlineupgrading and secondary development and the like, and can achieve calculation in storage, reduce data movement and reduce power consumption; and the chip hardware is reconfigurable and supports realization of different functions.

Description

technical field [0001] The invention belongs to the field of computer architecture, and relates to a flash memory control system capable of realizing processing instorage and reconfigurable functions, in particular to a reconfigurable computing storage fusion flash memory control system. Background technique [0002] In the history of computer hardware development, the mainstream view is that the performance of computing systems is limited by computing power, so a lot of research has been invested in computing and the development is rapid. In the past 20 years, the performance of the processor has increased by about 55% per year, while the processing speed of the memory and the interface bandwidth of the memory have increased by about 12% per year. The unbalanced development speed causes the memory processing speed and interface bandwidth to lag behind the computing speed of the processor, encountering the so-called memory wall and bandwidth wall problems. In the era of big...

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Problems solved by technology

The computing architecture that separates computing and storage causes the processor t

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