Low-temperature oxidation isolation technology for field isolation

A field isolation and low temperature technology, applied in the field of low temperature oxidation isolation technology, can solve the problems of high cost, high cost and complexity of the process, and achieve the effect of easy industrialization development

Inactive Publication Date: 2019-06-28
SHENZHEN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Its disadvantage is mainly that the process cost is more expensive and more complicated
[0006] To sum up, the above two processes need to be carried out in a high temperature environment at the same time, the cost is very high, and the isolation material is SiO 2 mainly

Method used

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  • Low-temperature oxidation isolation technology for field isolation
  • Low-temperature oxidation isolation technology for field isolation
  • Low-temperature oxidation isolation technology for field isolation

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0042] The Si substrate is selected in this embodiment.

[0043] First, the surface of the substrate 1 is cleaned, and the cleaning process includes first using H 2 SO 4 and H 2 o 2 The mixed solution cleans the substrate, where H 2 SO 4 :H 2 o 2 =10:1, the temperature is set at 120°C, and the time is 10min; then the surface of the substrate 1 is rinsed with deionized water; and then cleaned with hydrofluoric acid solution, wherein HF:H 2 O=1:50, the temperature was set at 25°C, and the time was 1min; finally, rinsed with deionized water and dried.

[0044] Reference attached figure 1 In part a, drop an appropriate amount of positive photoresist on the center of one surface of the substrate 1, apply the positive photoresist evenly with a spin coater to form a photoresist layer 2, and pre-baked it after coating evenly, so that Prevent the positive photoresist from sticking to other devices during operation, and remove excess positive photoresist at the edge; the positi...

Embodiment 2

[0051] In this embodiment, a GaN substrate is selected.

[0052] First, the surface of the substrate 1 is cleaned, and the cleaning process includes first using H 2 SO 4 and H 2 o 2 The mixed solution cleans the substrate, where H 2 SO 4 :H 2 o 2 =10:1, the temperature is set at 120°C, and the time is 10min; then the surface of the substrate 1 is rinsed with deionized water; and then cleaned with hydrofluoric acid solution, wherein HF:H 2 O=1:50, the temperature was set at 25°C, and the time was 1min; finally, rinsed with deionized water and dried.

[0053] Reference attached figure 1 In part a, drop an appropriate amount of positive photoresist on the center of one surface of the substrate 1, apply the positive photoresist evenly with a spin coater to form a photoresist layer 2, and pre-baked it after coating evenly, so that Prevent the positive photoresist from sticking to other devices during operation, and remove excess positive photoresist at the edge; the positi...

Embodiment 3

[0060] The Si substrate is selected in this embodiment.

[0061] First, the surface of the substrate 1 is cleaned, and the cleaning process includes first using H 2 SO 4 and H 2 o 2 The mixed solution cleans the substrate, where H 2 SO 4 :H 2 o 2 =10:1, the temperature is set at 120°C, and the time is 10min; then the surface of the substrate 1 is rinsed with deionized water; and then cleaned with hydrofluoric acid solution, wherein HF:H 2 O=1:50, the temperature was set at 25°C, and the time was 1min; finally, rinsed with deionized water and dried.

[0062] Reference attached figure 1 In part a, drop an appropriate amount of negative photoresist on the center of one surface of the substrate 1, apply the negative photoresist evenly to form a photoresist layer 2 with a spin coater, and pre-baked it after coating evenly, so as to Prevent negative photoresist from sticking to other devices during operation and remove excess negative photoresist at the edges. After the ph...

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Abstract

The invention relates to a low-temperature oxidation isolation technology for field isolation, and belongs to the technical field of electronic device and integrated circuit processing technologies. The low-temperature oxidation isolation technology comprises that the channel position in a substrate is determined in a photo-etching method, a channel is etched in the channel position by etching, and filled with a spacer, and a residue of photo-etching and superfluous spacer are removed. The photo-etching method comprises that the substrate is smeared with a photoresist, and a photoresist layeris formed on the substrate; the photoresist layer is covered with a masking plate to define the position of a concave area, and exposure is carried out; and post-baking and development are carried outto prepare the concave area on the photoresist layer, the channel to be filled is etched, the channel is filled, and the residue of photo-etching and superfluous spacer are removed. The processing technology can be completed in the low-temperature environment, the optical technology is simple and easy to realize, the cost is reduced, relatively more materials can be selected, and application is wider.

Description

technical field [0001] The invention belongs to the technical field of electronic devices and integrated circuit processing technology, and relates to a low-temperature oxidation isolation process applied to field isolation. Background technique [0002] Isolation technology is a key technology in integrated circuit manufacturing, and there are two main isolation technologies today: local oxidation (LOCOS: Local Oxidation of Silicon) isolation technology and shallow trench isolation (STI: Shallow Trench Isolation) isolation technology. [0003] The manufacturing process of the LOCOS structure is to use the characteristics of the SiN film to mask the oxide layer. First, a layer of SiN is covered on the active area of ​​the device, and then a thicker oxide layer is grown on the exposed isolation area by wet oxygen oxidation, and finally removed. The SiN layer forms the active area in which devices are fabricated. However, the biggest disadvantage of LOCOS is that the isolatio...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/762
Inventor 张猛闫岩周玮李贵君郭海成
Owner SHENZHEN UNIV
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