CMOS combination logic circuit

Abstract

The invention provides a CMOS (Complementary Metal-Oxide-Semiconductor Transistor) combinational logic circuit, which is used for replacing a combinational logic operation unit circuit in a standard unit library provided by a process plant when an adder circuit is designed. The CMOS combination logic circuit comprises a PMOS network and an NMOS network, wherein the PMOS network and the NMOS network respectively comprise three transistors. The logic operation function is realized through fewer transistors, the area is reduced, the power consumption is reduced, meanwhile, the path is shortened,and the transmission delay is reduced.

Description

technical field [0001] The invention relates to a circuit unit structure, in particular to a small CMOS combinational logic operation unit circuit for replacing the combinational logic operation unit circuit in a standard cell library provided by a process factory. Background technique [0002] When designing the core chip in a large-scale high-performance computing server, in the current design process, from the front-end RTL (resistor transistor logic circuit) design to the back-end implementation, all are based on the standard cell library provided by the process factory. Although the design cycle is short, But the available resources are limited (only the standard cell library provided by the process factory) and lack flexibility. When high-performance computing servers are sensitive to power consumption and speed, it is difficult to meet the performance requirements of the server with such a tool processing method, so designers need some low-power or speed-up logic cell...

AI Technical Summary

Problems solved by technology

When the high-performance computing server is very sensitive to power consumption and speed, it is difficult to meet the performance requirements of the server with such a tool processing method, so designers need some low-power consumption or speed-up logic cells to replace the combination in the standard cell library logic operation unit circuit, which reduces power consumption and increases speed

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