Asymmetric reconfigurable field effect transistor

Abstract

The invention discloses an asymmetric reconfigurable field effect transistor. The transistor includes a trench; a drain electrode arranged at one end of the trench; a source electrode which is arranged at the other end of the trench and extends into the trench; gate oxide which is arranged at the outer side of the channel; a control grid electrode and a polar grid electrode which are respectivelyarranged at the source electrode end and the drain electrode end and outside the grid electrode oxide; side walls which are respectively arranged outside the two ends of the trench and used for electrically isolating the control grid electrode, the polar grid electrode, the source electrode and the drain electrode; and the grid isolation part which is arranged outside the grid electrode oxide andused for isolating the control grid electrode from the polar grid electrode. The contact area between the source end extending into the trench and a nanowire trench is larger, the tunneling area of carriers is increased, and the starting current is increased. In a switching-off state, a drain electrode structure and a common RFET drain electrode structure have the same non-overlapping area, and aleakage current is basically kept unchanged, so that the current switch ratio is improved, and the operation delay time of a logic gate current is shortened under the condition that the static power consumption is not changed.

Description

Technical field [0001] The invention belongs to a digital logic and storage device in a CMOS very large integrated circuit (VLSI), and in particular relates to an asymmetric reconfigurable field effect transistor. Background technique [0002] The shrinking of the size and function of CMOS devices is pushing information processing technology into new application areas. This kind of shrinking enables many applications to be realized through stronger performance and higher complexity. However, due to the shrinking of the device size in the future, it will eventually reach the physical limit. Currently, new information processing devices and micro-architectures are being explored to extend the history of the integrated circuit development cycle that doubles the performance of the same area chip every 18 months. Field effect transistor (RFET) is one of them. Because RFET is a device that can obtain N-type and P-type electrical characteristics by applying different voltages to the po...

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Problems solved by technology

[0006] The purpose of the present invention is to solve the problem that the open-state drive current of the existing general symmetrical structure reconfigurable transistor is low, in order to improve the open current of the device, shorten the switching time of the transistor, and shorten the operation delay of the logic gate, propose an asymmetric The reconfigurable field effect transistor of the symmetric structure can realize the improvement of the N-type and P-type leakage currents of the device under the same order of magnitude as the leakage current of the N-type and P-type devices. Different polarity open-state driving current, improve the current switching ratio of the device, reduce the delay time of the logic gate of the integrated circuit, and increase the characteristic frequency of the transistor

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