Asymmetric channel dielectric ring field effect transistor

Abstract

The invention discloses an asymmetric channel dielectric ring field effect transistor. The transistor comprises a source electrode, a drain electrode, a source electrode extension region, a drain electrode extension region, a channel, a grid electrode, a substrate, an insulating isolation layer in the substrate, and an insulating dielectric ring arranged at the periphery of a nanowire channel close to the drain electrode extension region. Due to the fact that the dielectric constant and the forbidden band width of the insulating medium ring structure are large, the tunneling probability of carriers at the drain end is reduced, the gate-induced drain leakage current is effectively reduced, and the on-state current is hardly affected. And the structure is embedded in the gate oxide layer, sothat the gate-all capacitance is not increased, and the dynamic characteristics are not influenced. Therefore, on the premise that the dynamic performance of a gate-all-around device is not damaged,the GIDL electric leakage of the device is reduced, and the current switching ratio of the device is improved, so that the performance of an integrated circuit is improved.

Description

technical field [0001] The invention belongs to digital logic and storage devices in CMOS very large integrated circuits (VLSI), and in particular relates to an asymmetric channel dielectric ring field effect transistor, which can effectively reduce the gate-induced drain leakage current of semiconductor devices. Background technique [0002] According to Moore's Law, the performance of integrated circuits with the same chip area will double every 18 months. Therefore, with the reduction of device size, the gate-all-around field-effect transistor (GAA MOSFET), with its excellent gate control ability, can effectively reduce the short-channel effect, but at the same time it causes serious gate-induced-drain leakage current. Gate Induced Drain Leakage (GIDL for short), in a gate-around transistor, when the device is turned off, that is, the voltage on the gate is at 0 V and a small bias near 0 V and the drain and positive Connected to the voltage drop, the overlap between the ...

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Problems solved by technology

[0004] The purpose of the present invention is to solve the serious problem of gate-induced-drain leakage current of the existing traditional gate-around transistors, in order to reduce the off-state current of the device and reduce static power consumption, a new type of asymmetrical channel dielectric ring is proposed. Field-effect transistors, on the premise that the dynamic performance of the gate-around device is not damaged, reduce the GIDL current of the device and increase the current switching ratio of the device, thereby improving the performance of the integrated circuit

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