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Anti-space single event upset system of satellite-borne transceiver

A single-event flipping and communication machine technology, which is applied in transmission systems, radio transmission systems, electrical components, etc., can solve problems such as insufficient ability to resist space single-event flipping

Active Publication Date: 2020-01-14
SHANGHAI SPACEFLIGHT INST OF TT&C & TELECOMM
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In order to solve the problem of insufficient anti-single event inversion capability of existing space-borne transceivers, the present invention provides an anti-single event inversion system for space-borne transceivers, including:

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  • Anti-space single event upset system of satellite-borne transceiver
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Embodiment Construction

[0032] In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0033] Such as figure 1 As shown, the present invention provides a space-borne transceiver anti-single event reversal system, including:

[0034] Anti-fuse FPGA chip, used to refresh the internal configuration information of SRAM FPGA in real time;

[0035] The monitoring FPGA is an FPGA program programmed in the antifuse FPGA chip, and the FPGA program is implemented using Verilog hardware description language.

[0036] Here, the present invention is applied to an intermediate frequency processing module of a satellite-borne transceiver, and uses an anti-fuse FPGA chip to refresh the internal configuration information of the SRAM FPGA in real time. The monitoring FPGA is the FPGA program burned in the antifuse FPGA chip, and is...

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Abstract

The invention provides an anti-space single event upset system of a satellite-borne transceiver. The system is applied to an intermediate frequency processing module of a satellite-borne transceiver.The main function of the system is to refresh the internal configuration information of the SRAM type FPGA in real time by using an anti-fuse FPGA chip, so that on the premise that the SRAM type FPGAworks uninterruptedly, single event upset occurring in the SRAM type FPGA is corrected, and the method is an effective measure for resisting space single event upset of the SRAM type FPGA. The monitoring FPGA is an FPGA program burnt in an anti-fuse FPGA chip. Functional modules of the system comprise a top layer module, a power-on reset signal generation module, an instruction pulse detection module, a timing module, a refreshing module and a one-out-of-three module. The anti-fuse FPGA peripheral interface circuit chip comprises an SRAM type FPGA, a PROM chip, a watchdog chip, a level shifterchip and a clock driving chip. The system has certain universality and can be widely applied to satellite-borne transceiving communication equipment with similar functions.

Description

technical field [0001] The invention relates to an anti-space single event flipping system of a space-borne transceiver communication machine. Background technique [0002] The space-borne transceiver plays an extremely important role in space measurement and control. It receives uplink measurement signals to complete ranging and speed measurement functions, receives uplink remote control signals, and forwards downlink telemetry signals and downlink measurement signals. The main functions of the on-board transceiver are realized by the channel signal processing module, and the function of the channel signal processing module is completed by the SRAM-based large-scale million-gate FPGA. [0003] SRAM-type FPGA is a kind of FPGA with SRAM structure using CMOS technology as the storage unit. It has the advantages of large capacity, low development cost, and short development cycle. SRAM-type FPGA for aerospace also has a certain ability to resist total space dose radiation, and...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04B7/185
CPCH04B7/18515
Inventor 何舟郝占炯方轶吴涛谢晔李春萍
Owner SHANGHAI SPACEFLIGHT INST OF TT&C & TELECOMM