Matrix processing device, method and processing equipment
A processing device and matrix technology, applied in the field of data processing, can solve problems such as tediousness, numerous steps, and complex operation logic of the device, and achieve the effects of simplifying operation logic, improving processing capacity, and simple wiring
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example 1
[0079] See Image 6 , is a schematic structural diagram of the matrix processing device 600 provided by the embodiment of the present invention. The matrix processing device 600 includes a node network 620 , a data memory 630 , a decoder 640 and a data cache array 650 . The node network 620 is coupled in the form of a two-dimensional matrix by the node units 610 along the horizontal direction and the vertical direction. The node unit 610 includes a first register, a second register, a reconfiguration controller, and a reconfiguration actuator. The reconfiguration controller is connected to the first register, the second register and the reconfiguration actuator respectively; the first register is coupled along a straight line in the horizontal direction to form a first register chain, and the second register is coupled to a second register chain along a straight line in a vertical direction. The register chain; the reconfiguration actuators are coupled to each other along st...
example 2
[0100] See Figure 12 , is a schematic structural diagram of the matrix processing device 1200 provided by the embodiment of the present invention. The matrix processing device 1200 includes a node network 1220 , a data memory 1230 , a decoder 1240 and a data cache array 1250 . The node network 1220 is coupled in the form of a two-dimensional matrix by the node units 1210 along the horizontal direction and the vertical direction. The node unit 1210 includes a first register, a second register, a reconfiguration controller, and a reconfiguration actuator. The reconfiguration controller is connected to the first register, the second register and the reconfiguration actuator respectively; the first register is coupled along a straight line in the horizontal direction to form a first register chain, and the second register is coupled to a second register chain along a straight line in a vertical direction. The register chain; the reconfiguration actuators are coupled to each oth...
example 3
[0114] See Figure 16, is a schematic structural diagram of the matrix processing device 1600 provided by the embodiment of the present invention. The matrix processing device 1600 includes a node network 1620 , a data memory 1630 , a decoder 1640 and a data cache array 1650 . The node network 1620 is coupled in the form of a two-dimensional matrix by the node units 1610 along the horizontal direction and the vertical direction. The node unit 1610 includes a first register, a second register, and a reconfiguration controller. The reconfiguration controller is respectively connected to the first register and the second register; the first register is coupled along a straight line in the horizontal direction to form a first register chain, and the second register is coupled to form a second register chain along a straight line in the vertical direction.
[0115] The decoder 1640 is connected to the node network 1620 and the data storage 1630 respectively. The data storage 163...
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