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Preparation method of array substrate and array substrate

An array substrate and substrate technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve problems such as the inability to meet the application requirements of narrow-channel thin-film transistors, and achieve the effect of meeting application requirements and reducing corrosion rates.

Inactive Publication Date: 2020-02-28
SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
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  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, when the etching process is used to pattern the metal film layer, because the corrosion rate of copper in the etching solution is relatively fast, the channel (the distance between the source and the drain) of the thin film transistor will usually change. Wide, so it cannot meet the application requirements of narrow channel thin film transistors

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  • Preparation method of array substrate and array substrate
  • Preparation method of array substrate and array substrate
  • Preparation method of array substrate and array substrate

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preparation example Construction

[0050] An embodiment of the present application provides a method for manufacturing an array substrate 100, which includes the following steps:

[0051] Step S101: providing a substrate 11;

[0052] Step S102: forming a patterned first metal structure layer 12 on the substrate 11, the first metal structure layer 12 includes a fourth metal thin film layer 121, a fifth metal thin film layer 122 and a sixth metal thin film layer 123 formed in sequence;

[0053] Step S103: forming an insulating layer 13 on the substrate 11;

[0054]Step S104: forming a semiconductor layer 14 on the substrate 11;

[0055] Step S105: forming a second metal structure layer 15 on the semiconductor layer 14, the second metal structure layer 15 includes a third metal thin film layer 153, a first metal thin film layer 151 and a second metal thin film layer 152 formed in sequence;

[0056] Step S106: Etching the second metal structure layer 15 and the semiconductor layer 14 with an electrolyte solution ...

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Abstract

The invention provides a preparation method of an array substrate and an array substrate. The preparation method includes the step of sequentially forming a first metal structure layer, an insulatinglayer, a semiconductor layer and a second metal structure layer on a substrate. The second metal structure layer includes a first metal thin film layer and a second metal thin film layer which are sequentially formed. The second metal structure layer is etched with an electrolyte solution to form a second patterned metal structure layer. The second patterned metal structure layer includes a sourceand a drain. According to the invention, the first metal thin film layer, the second metal thin film layer and an electrolyte solution are used to form a primary battery, and the second metal thin film layer is used as an anode, so that the corrosion rate of the first metal thin film layer is suppressed and the application requirements of narrow-channel thin film transistors are met.

Description

technical field [0001] The present application relates to the field of display technology, in particular to a method for preparing an array substrate and the array substrate. Background technique [0002] At present, active matrix liquid crystal displays and active matrix organic electroluminescent diodes, which have significant advantages such as large size, high frame rate processing, and high transmittance in the visible light range, have broad application prospects in the display field. [0003] With the increase of the size of the display panel, in order to further reduce the capacitance-resistance delay effect of the metal wiring, the technical route of preparing the metal wiring with copper as the main material has been adopted in the metal wiring. At the same time, in order to increase the resolution of the display panel, the size of the thin film transistor is minimized on the premise of increasing the aperture ratio. However, when the etching process is used to pa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/77H01L21/3213H01L27/12
CPCH01L21/32134H01L27/124H01L27/1259
Inventor 罗传宝田代
Owner SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD