Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Trench type metal oxide semiconductor schottky barrier transistor preparation method

A technology of oxide semiconductor and Schottky potential, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., and can solve problems such as damage to silicon substrates

Active Publication Date: 2022-05-10
CSMC TECH FAB2 CO LTD
View PDF28 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Based on this, it is necessary to provide a trenched metal oxide semiconductor Schottky barrier transistor for the problem that the oxide layer etching process in the preparation process of the trenched metal oxide semiconductor Schottky barrier transistor will damage the underlying silicon substrate. Fabrication method of barrier transistor

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Trench type metal oxide semiconductor schottky barrier transistor preparation method
  • Trench type metal oxide semiconductor schottky barrier transistor preparation method
  • Trench type metal oxide semiconductor schottky barrier transistor preparation method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0028] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the associated drawings. A preferred embodiment of the invention is shown in the drawings. However, the present invention can be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of the present invention will be thorough and complete.

[0029] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field of the invention. The terms used herein in the description of the present invention are for the purpose of describing specific embodiments only, and are not intended to limit the present invention. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0030] It sho...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
Login to View More

Abstract

The invention relates to a method for preparing TMBS, comprising: providing a semiconductor structure, the semiconductor structure includes a silicon substrate and a silicon oxide layer formed on the surface of the silicon substrate, an etching window is defined on the silicon oxide layer; an etching silicon oxide layer forming process The etching step includes: step A: placing the semiconductor structure in the reaction chamber; step B: filling the first etching gas and adjusting the radio frequency power to the first power to etch the silicon oxide layer. The first power is greater than 400W; step C: before the silicon oxide layer is completely etched, adjust the RF power to the second power, and continue etching the silicon oxide layer until the silicon oxide layer is completely etched to form a process hole, the second power is less than the first power ; Etching the silicon substrate below the process hole and forming TMBS. In the above preparation method, the etching of the silicon oxide layer is divided into two stages and the radio frequency power is reduced in the second stage, thereby reducing the damage to the silicon surface, and the obtained TMBS has better performance.

Description

technical field [0001] The invention relates to the field of semiconductor technology, in particular to a method for preparing a trench type metal oxide semiconductor Schottky barrier transistor. Background technique [0002] Compared with traditional Schottky rectifier devices, Trench MOS Barrier Schottky barrier transistor (Trench MOS Barrier Schottky, TMBS) has lower reverse leakage current and higher reverse breakdown voltage, That is, TMBS has better forward conduction and reverse blocking characteristics. Such as figure 1 As shown, the TMBS die includes a semiconductor structure, the semiconductor structure is based on a silicon substrate 110, an oxide layer 120 is formed on the silicon substrate, and then the middle oxide layer is etched away by an etching process to form a process hole 121 To expose the silicon substrate, then etch the silicon below the process hole to form a trench, deposit a gate oxide layer 111 on the inner wall of the trench and fill the trench...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/311H01L21/67H01L21/329
CPCH01L29/66143H01L21/31116H01L21/67253
Inventor 王晓日冒义祥周俊芳
Owner CSMC TECH FAB2 CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products