Electrostatic discharge protection structure based on SOI process
An electrostatic discharge protection and ESD protection technology, which is applied in the direction of circuits, electrical components, and electric solid devices, can solve problems such as poor ESD protection performance, improve electrostatic discharge protection capabilities, prevent overheating and burnout, and eliminate device breakdown and burnout The effect of the phenomenon
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Embodiment 1
[0026] In this example, see figure 2 , provides an electrostatic discharge protection structure based on SOI technology. It should be noted that the drawings are not drawn to scale, and the drawings are all in a very simplified form, which is only used to facilitate and clearly illustrate the purpose of this embodiment . The electrostatic discharge protection structure based on the SOI process of this embodiment includes an SOI substrate and an ESD protection device located on the SOI substrate; the ESD protection device includes a first conductive region 1, a second conductive region 2 and a third conductive region 3, the first A conductive region 1, a second conductive region 2 and a third conductive region 3 are located on the same plane, and the third conductive region 3 is respectively in contact with the first conductive region 1 and the second conductive region 2; the first conductive region 1 is formed with a An electrode 7, a second electrode 8 is formed on the seco...
Embodiment 2
[0037] In this embodiment, continue to refer to figure 2 , providing an electrostatic discharge protection structure based on SOI technology. The difference between the electrostatic discharge protection structure based on the SOI process of this embodiment and the first embodiment is that the first conductivity type is P-type, the second conductivity type is N-type, and the ESD protection device is a PMOS transistor.
[0038] In a preferred embodiment, a drain region (P+)-N well-source region (P+) parasitic transistor can be formed inside the ESD protection device. When an ESD pulse is applied to the PAD, the parasitic transistor PNP is turned on, and the leakage Discharge ESD current, so as to protect other protected circuits from electrostatic discharge.
[0039] In a specific implementation manner, the N-type well region, the P+-type source region and the P+-type drain region are all formed deep into the buried oxide layer 4 .
[0040] In this embodiment, as an example,...
Embodiment 3
[0043] In this embodiment, continue to refer to figure 2 , providing an electrostatic discharge protection structure based on SOI technology. The difference between the electrostatic discharge protection structure based on the SOI process of this embodiment and Embodiment 1 is that the first conductive region 1 is formed as the first conductive type ion implantation region, and the second conductive region 2 is formed as the second conductive type ion implantation region. The third conductive region 3 is formed as a well region of the first conductive type or the second conductive type, and the ESD protection device is configured as a diode.
[0044] In a specific implementation manner, the first conductivity type is P-type, and the second conductivity type is N-type, forming a PNP diode. When an ESD pulse is applied to the anode, the diode is turned on to discharge the ESD current. The first electrode 7 is a positive electrode, and the second electrode 8 is a negative elec...
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