Gating tube material, gating tube unit and manufacturing method thereof

A technology of gate tube and material layer, applied in the field of micro-nano electronics, can solve the problem of large turn-on voltage, and achieve the effects of small turn-on voltage, high driving force, and low leakage conductance

Active Publication Date: 2020-09-29
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

But it has the disadvantage of large turn-on voltage

Method used

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  • Gating tube material, gating tube unit and manufacturing method thereof
  • Gating tube material, gating tube unit and manufacturing method thereof
  • Gating tube material, gating tube unit and manufacturing method thereof

Examples

Experimental program
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Effect test

Embodiment 1

[0053] Such as figure 2 as shown, figure 2 The voltage-current curve of the gating tube unit that is the germanium sulfide (GeS) material preparation in the prior art; The gating tube material layer 1 that the thickness that uses material germanium sulfide (GeS) to obtain is 20 nanometers, and the second electrode 3 is the diameter The first electrode 2 is an aluminum electrode, and a 10 nanometer thick titanium nitride (TiN) transition layer is provided between the first electrode 2 and the material layer 1 of the gate tube.

[0054] Such as figure 2 As shown, when the voltage applied to the gate unit is less than 5V, the gate unit is in the off state, and the leakage current is less than 10 -10 A; When the voltage applied to the gate unit exceeds the threshold voltage, the gate unit is instantly opened, and the current through the gate unit increases sharply to 10 -2 A: When the voltage applied to the gating tube unit is removed (that is, the voltage is 0.5V), the gati...

Embodiment 2

[0063] The through tube material provided by this application combines the GeS target with the As 2 Te 3 The target is obtained by co-sputtering and co-sputtering;

[0064] The gating tube unit disclosed in this application includes a first electrode layer 2, a second electrode layer 3 and a gating tube material layer 1, wherein the gating tube material layer 1 is obtained by sputtering the above gating tube material, and the first electrode 2 is located on the upper surface of the gate material layer 1; the second electrode 3 is located on the lower surface of the gate material layer 1;

[0065] The material of the first electrode layer 2 is aluminum with a thickness of 190 nanometers, the material of the second electrode layer 3 is aluminum with a thickness of 190 nanometers, and the thickness of the gate tube material layer 1 is 20 nanometers.

[0066] Moreover, a transition layer is provided on the upper surface of the gate material layer 1, and the first electrode 2 is ...

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Abstract

The invention relates to the technical field of micro-nano electronics, and discloses a gating tube material which is a compound containing germanium sulfide (GeS) and arsenic telluride (As2Te3). Thegeneral chemical formula of the gating tube material is (GeS)1-X(As2Te3)X, wherein X is the proportion of the compound, and X is larger than 0 and smaller than or equal to 0.5. The gating tube material provided by the invention has the characteristic of small turn-on voltage.

Description

technical field [0001] The invention relates to the field of micro-nano electronics technology, in particular to a gating tube material, a gating tube unit and a manufacturing method thereof. Background technique [0002] With the popularity of computers and the advent of the era of big data, memory occupies an important position in the semiconductor market. Memory needs to develop towards higher integration and higher speed. In order to cope with the bottleneck of memory development, various new types of memory have emerged, such as phase change memory, resistive change memory, magnetic memory, ferroelectric memory, etc. To achieve high-density storage, it is necessary to use interleaved storage arrays. The read-write crosstalk is the biggest problem faced by this storage array. Currently the most effective solution is to connect a gating unit in series with each memory unit. This requires the gating device to have nonlinear characteristics, that is, when the applied vo...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L45/00
CPCH10N70/24H10N70/8822H10N70/011H10N70/8828
Inventor 贾淑静朱敏陈鑫沈佳斌武仁杰宋志棠
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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