LDMOS device and manufacturing method thereof

A manufacturing method and device technology, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as unfavorable reliability optimization, large deviations in the characteristic parameters of on-wafer devices and devices, and improve competitiveness. , the effect of reducing the size of polysilicon

Pending Publication Date: 2020-11-03
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Although the LDMOS device of the related art includes a high-voltage-resistant drift region 113 and a high-voltage well region that can improve the device drain current concentration effect, as the size of the polysilicon gate of the

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • LDMOS device and manufacturing method thereof
  • LDMOS device and manufacturing method thereof
  • LDMOS device and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0043] The technical solutions in this application will be clearly and completely described below in conjunction with the accompanying drawings. Apparently, the described embodiments are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0044] In the description of this application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" etc. The indicated orientation or positional relationship is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, use a specific orientati...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention relates to the technical field of semiconductor manufacturing, in particular to an LDMOS device and a manufacturing method thereof. The method comprises the following steps: providing asemiconductor substrate, and forming a shallow trench isolation structure around the semiconductor substrate of the device, wherein the shallow trench isolation structure extends downwards from the front face of the semiconductor substrate; forming a drift region in the semiconductor substrate surrounded by the shallow trench isolation structure; forming a body region in the drift region of the source end region of the device; forming a gate structure bridged between the body region and the drain terminal region; forming a high-voltage LDD region in the drift region of the drain terminal region of the device; forming side walls at the side edges of the gate structures of the connector region and the high-voltage LDD region respectively; respectively forming a source region and a drain region in the body region and the high-voltage LDD region, wherein the source region and the drain region form overlapping regions with the corresponding side walls, wherein the device is manufactured bythe method.

Description

technical field [0001] The present application relates to the technical field of semiconductor manufacturing, in particular to an LDMOS device and a manufacturing method thereof. Background technique [0002] DMOS (Double-diffused MOS) is currently widely used in power management circuits due to its characteristics of high voltage resistance, high current drive capability and extremely low power consumption. Lateral double-diffused metal oxide semiconductor field effect transistor (LateralDouble-diffused MOS, LDMOS) is a kind of DMOS, and one of the main inspection parameters is on-resistance (Rds-on). On-resistance refers to when the device is working, Resistance from drain to source. For LDMOS devices, reducing the on-resistance as much as possible is the goal pursued by the BCD process. Due to the small on-resistance between the drain and source, the LDMOS device will have better switching characteristics and a larger output current, which can have a stronger drive capa...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H01L29/78H01L29/06H01L21/336
CPCH01L29/0619H01L29/66681H01L29/7816
Inventor 许昭昭
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap