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Radio frequency soi structure and preparation method thereof

A technology of radio frequency and isolation structure, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as difficult to effectively realize the integration of digital circuits, analog circuits and radio frequency circuits, and reduce impurity pollution and circuit The effect of reducing crosstalk between substrates and reducing substrate coupling noise

Active Publication Date: 2021-06-22
MICROTERA SEMICON (GUANGZHOU) CO LTD
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Problems solved by technology

[0006] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a radio frequency SOI structure and its preparation method, which is used to solve the problems in the prior art that it is difficult to effectively realize the integration of digital circuits, analog circuits and radio frequency circuits, etc.

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  • Radio frequency soi structure and preparation method thereof
  • Radio frequency soi structure and preparation method thereof
  • Radio frequency soi structure and preparation method thereof

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preparation example Construction

[0048] Such as figure 1 Shown, the present invention provides a kind of preparation method of radio frequency SOI structure, and described preparation method comprises the following steps:

[0049] S1, providing a first SOI wafer and a second SOI wafer, the first SOI wafer includes a first bottom layer of silicon, a first buried oxide layer, and a first top layer of silicon, and the second SOI wafer includes a second bottom layer Silicon, a second buried oxide layer, and a second top layer of silicon;

[0050] S2, removing the first underlying silicon of the first SOI wafer, and removing the second top silicon of the second SOI wafer;

[0051] S3, bonding the first SOI wafer to the second SOI wafer based on the exposed first buried oxide layer and the second buried oxide layer, and bonding the first SOI wafer to the second SOI wafer Forming an intermediate silicon layer and a metal layer between the second SOI wafers;

[0052] S4, preparing several first isolation structure...

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Abstract

The invention provides a radio frequency SOI structure and a preparation method thereof. The preparation method includes: providing a first SOI wafer and a second SOI wafer, processing and bonding the two to obtain a double-buried oxygen isolation SOI structure, and preparing the first isolation The isolation structure, the metal contact structure and the second isolation structure form a radio frequency module, an analog module and a digital module, a first isolation structure is formed between the analog module and the digital module, and the radio frequency module and the analog module and the radio frequency module and the digital module A first isolation structure and a second isolation structure are formed therebetween. The invention utilizes double-buried oxygen isolation SOI structure, which can reduce substrate coupling noise and crosstalk between circuits; can realize the integration of radio frequency, analog and digital circuits; utilizes bonding metal and buffer layer to manufacture double-buried oxygen isolation SOI, and can realize low-temperature bonding Combined to reduce impurity pollution; the middle metal layer can flexibly adjust the back bias voltage of different circuits, so as to realize the modulation of different frequencies and maximize the system performance.

Description

technical field [0001] The invention belongs to the field of radio frequency integrated circuits, in particular to a radio frequency SOI structure and a preparation method thereof. Background technique [0002] With the development of system-on-chip, high-frequency radio frequency (Radio Frequency, RF), high-precision analog and high-speed digital chips will be integrated on one substrate in order to achieve improved performance and reduced power consumption. [0003] One of the biggest challenges in SoC (System On Chip) design is noise coupling between on-chip sub-circuit modules. For mixed-signal chips, the common substrate and power lines will cause noise coupling between sensitive analog / RF circuits and high-frequency, wide-swing digital circuits, resulting in overall chip performance degradation. The shared silicon substrate is a non-negligible noise medium, which is mainly manifested in: 1) The conversion of the digital state will cause voltage fluctuations in the low...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/762H01L27/12
CPCH01L21/76251H01L27/1207
Inventor 戴彬刘海彬向可强班桂春刘森
Owner MICROTERA SEMICON (GUANGZHOU) CO LTD
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