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Hardware system for realizing improved FIOS modular multiplication algorithm

A hardware system and modular multiplication technology, applied in the field of data encryption and decryption, can solve the problems of consuming hardware resources and reducing operating efficiency, and achieve the effect of reducing code length, reducing the number of loops, and improving the calculation bit width and calculation speed.

Active Publication Date: 2021-03-12
HANGZHOU DIANZI UNIV
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the Montgomery algorithm, due to the large number of digits in the calculation data and intermediate results, it needs to consume a lot of hardware resources, and the operating efficiency will also be reduced.

Method used

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  • Hardware system for realizing improved FIOS modular multiplication algorithm
  • Hardware system for realizing improved FIOS modular multiplication algorithm
  • Hardware system for realizing improved FIOS modular multiplication algorithm

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Embodiment Construction

[0024] Below in conjunction with accompanying drawing, the present invention will be further explained;

[0025] like figure 1 Shown, a kind of hardware system that realizes improved FIOS modular multiplication algorithm, comprises storage module, modular multiplication algorithm module, booth multiplier module and modular multiplication parameter n'[0] selection module.

[0026] The storage module includes two memories of 96*128bit RAM1 and 40*128bit RAM2, wherein RAM1 is used to store the input multiplicand A, multiplier B and modulus N, and RAM2 is used to store the output result.

[0027] The Montgomery modular multiplication algorithm in the prior art is:

[0028]

[0029] The modular multiplication algorithm module adds a set of registers, and compresses the number of pipeline stages through parallel processing of the pre-computation link 1 and the carry calculation link 3, where the key path of the original algorithm is connected with three numbers in one cycle , d...

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Abstract

The invention discloses a hardware system for realizing an improved FIOS modular multiplication algorithm. A modular multiplication circuit is realized by adopting hardware, and logic resource consumption is reduced through register multiplexing; rearranging the assembly line and the whole algorithm time sequence, and disassembling the addition operation of the critical path into multi-stage assembly line addition tree operation, so that the maximum operation rate reaches 600MHz; the number of operations in a single clock period is increased through parallelization processing of independent operations; a 128-base multiplier is used as a basic calculation unit, only 3463 periods are needed for completing 4096-bit modular multiplication, consumed time is about 5.75 us, the number of cycles in the calculation process is remarkably reduced, the number of clocks needed by operation is reduced, and the calculation throughput rate in unit time is increased. According to the invention, the partial product generation circuit is improved, and the use of logic gates is further reduced. According to the method, the code length in the Montgomery modular multiplication algorithm is reduced through improvement, and the operation efficiency of the modular multiplication process is improved.

Description

technical field [0001] The invention relates to the field of data encryption and decryption, and specifically designs a hardware system for realizing an improved FIOS modular multiplication algorithm. Background technique [0002] With the rapid development of Internet technology, the Internet of Things has penetrated into all aspects of social life, but the development of information security technology is relatively lagging behind. While the era of big data brings convenience to people, it also brings many security problems. Ensuring network information security has become a hot research topic. [0003] One of the key technologies to ensure network information security is encryption and decryption technology. At present, there are two widely used encryption forms: traditional encryption and public key encryption. During 1978, R.Rivest, A.Shamir and L.Adleman proposed the RSA algorithm. The RSA public key encryption algorithm is also the most mature and widely used encrypt...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/72
CPCG06F7/722
Inventor 王敏杰孙浩孙玲玲
Owner HANGZHOU DIANZI UNIV
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