Photoetching-freezing-photoetching-etching double-patterning method

Abstract

The invention provides a photoetching-freezing-photoetching-etching double-patterning method. The method comprises the following steps of: presenting a first photoresist layer on a substrate, forminga first pattern structure in the first photoresist layer through a first photoetching process, and performing surface imaging on the first pattern structure; forming a silicon-containing polymer layeron the surface layer of the first pattern structure by adopting a gas-phase silylation reagent; performing gas treatment on the silicon-containing polymer layer to form a barrier layer on the surfacelayer of the first pattern structure; freezing the first pattern structure, and forming a second pattern structure on the substrate; and etching the substrate by taking the frozen first pattern structure and the frozen second pattern structure as mask layers to form a target pattern. The first pattern structure can be prevented from being damaged in the subsequent process by freezing the first pattern structure, and the thickness of the generated barrier layer is controlled through reaction temperature and time, so the line width of the first pattern structure and the line width of the formedtarget pattern can be controlled, and line width uniformity is improved. The whole method is simple in process, low in cost and high in productivity.

Description

technical field [0001] The invention relates to the field of microelectronics and semiconductor integrated circuit manufacturing, in particular to a photolithography-freezing-photolithography-etching double patterning method. Background technique [0002] In the field of semiconductor manufacturing, photoresist materials are used to transfer mask patterns to one or more material layers, for example, to transfer mask patterns to metal layers, dielectric layers or semiconductor substrates. With the continuous development of the technology node of the semiconductor manufacturing process, the integration of semiconductor devices is getting higher and higher, and the feature size of the semiconductor process is getting smaller and smaller. Mask patterns with small feature sizes are formed in the material layer by photolithography. become more and more difficult. [0003] For technology nodes below 28nm, the single patterning technology using deep ultraviolet (DUV, that is, light...

AI Technical Summary

Problems solved by technology

The traditional LFLE process usually needs to process the fixed material to ensure the line width of the pattern structure and the cleanliness of structures other than the pattern structure. The process is more complicated and the cost is higher.

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