Semiconductor device, and capacitance hole preparation method thereof

Abstract

The invention relates to a capacitor hole preparation method and a semiconductor device comprising a capacitor hole. The preparation method comprises the following steps: forming a first dielectric layer, a first mask layer, a first pattern layer, a second dielectric layer, a second mask layer and a second pattern layer which are stacked on a substrate; enabling the first pattern layer and the second pattern layer to enclose a grid; forming a third mask layer on the second pattern layer to cover the second mask layer in the edge region and expose the second mask layer in the middle region; etching the exposed second mask layer until the second dielectric layer is exposed; etching the exposed second dielectric layer until the first pattern layer and the first mask layer are exposed; and removing the third mask layer, etching the exposed first mask layer and the second pattern layer and the second mask layer in the edge region until the first dielectric layer is exposed, etching the exposed first dielectric layer until the etching selection ratio of the second mask layer to the first mask layer is greater than 1, and forming a capacitor hole. According to the invention, while the first mask layer in the middle area is etched, the line height of the edge area is etched and reduced.

Description

technical field [0001] The invention relates to the field of semiconductor device manufacturing, in particular to a semiconductor device and a method for preparing a capacitance hole of the semiconductor device. Background technique [0002] Semiconductor devices, such as dynamic random access memory (DRAM), record information by storing and releasing electric charge through capacitors. The capacitor is specifically prepared on the semiconductor substrate. In order to increase the density of the semiconductor substrate and improve the degree of integration, a trench capacitor is usually used. First, a trench with a certain depth is opened as a capacitor hole, and then the electrode plate and the capacitor are sequentially deposited in the capacitor hole. The dielectric layer and the upper electrode plate form a trench capacitor. [0003] At present, the process of opening capacitor holes will leave a certain height of sidewalls in the edge region of the semiconductor device...

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Problems solved by technology

[0004] Based on this, this application aims at the technical problem that the sidewalls in the edge region are easy to co

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