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Semiconductor structure and forming method thereof

A semiconductor and gas technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of reducing the yield rate of semiconductor devices and manufacturing process limitations, so as to improve yield rate, improve graphic accuracy, and reduce roughness Effect

Pending Publication Date: 2021-05-14
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to the manufacturing process limitations of self-aligned double imaging technology and self-aligned quadruple imaging technology, the yield rate of semiconductor devices is reduced

Method used

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  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof

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Experimental program
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Effect test

Embodiment Construction

[0036] As mentioned in the background art, further improvement of the fabrication process of self-aligned multiple imaging technology is required.

[0037] Figure 1 to Figure 5 It is a schematic cross-sectional structure diagram of the pattern forming process of a self-aligned dual imaging technology;

[0038] Please refer to figure 1 , forming a layer 20 to be etched on the semiconductor substrate 10;

[0039] Please refer to figure 2 , forming a sacrificial material layer (not shown) to be etched on the surface of the layer to be etched 20, etching the sacrificial material layer to be etched to form a patterned sacrificial layer 30, exposing a part of the sacrificial material layer to be etched the surface of the etch layer 20;

[0040] Please refer to image 3 , deposit a sidewall material layer (not shown) with a relatively uniform thickness on the surface of the patterned sacrificial layer 30 and the surface of the layer 20 to be etched, and etch the sidewall mater...

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PUM

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Abstract

The invention discloses a semiconductor structure and a forming method thereof. The method comprises the steps of providing a to-be-etched layer; forming an initial sacrificial layer on the to-be-etched layer; performing a modification treatment process on the side wall of the initial sacrificial layer, and forming a transition layer on the side wall of the initial sacrificial layer; and removing the transition layer to form a sacrificial layer. According to the forming method, the side wall roughness of the sacrificial layer is reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the advancement of semiconductor manufacturing technology, in order to achieve faster computing speed, larger data storage capacity and more functions of semiconductor devices, many different methods are used in the prior art to reduce the feature size (CD), reaching The purpose of increasing the integration density of semiconductor chips includes using Self-Aligned-Double-Patterning (SADP) and Self-Aligned-Quadra Patterning (SAQP). [0003] Both the self-aligned dual imaging technology and the self-aligned quadruple imaging technology have achieved a doubling of the spatial pattern density. However, due to the limitation of the manufacturing process of the self-aligned double imaging technology and the self-aligned quadruple imaging technology, the yield rate of the semiconductor d...

Claims

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Application Information

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IPC IPC(8): H01L21/033
CPCH01L21/0337
Inventor 苏博郑二虎王彦张海洋
Owner SEMICON MFG INT (SHANGHAI) CORP